Lines Matching refs:pinNumber
91 int pinNumber; in am33xx_gpio_hdr() local
97 for (pinNumber = 0; pinNumber < sizeof(irq_param->hdr_tab); pinNumber++) in am33xx_gpio_hdr()
101 irq_hdr = &irq_param->hdr_tab[pinNumber]; in am33xx_gpio_hdr()
145 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_mode() local
149 reg(GPIO_BASE[gpiox] + GPIO_OE) &= ~(1 << pinNumber); in am33xx_pin_mode()
153 reg(GPIO_BASE[gpiox] + GPIO_OE) |= (1 << pinNumber); in am33xx_pin_mode()
161 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_write() local
165 reg(GPIO_BASE[gpiox] + GPIO_SETDATAOUT) = (1 << pinNumber); in am33xx_pin_write()
169 reg(GPIO_BASE[gpiox] + GPIO_CLEARDATAOUT) = (1 << pinNumber); in am33xx_pin_write()
177 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_read() local
179 return reg(GPIO_BASE[gpiox] + GPIO_DATAIN) & (1 << pinNumber) ? 1 : 0; in am33xx_pin_read()
187 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_attach_irq() local
189 struct am33xx_pin_irq_hdr *irq_hdr = &GPIO_PARAMx[gpiox].hdr_tab[pinNumber]; in am33xx_pin_attach_irq()
207 REG32(baseAdd + GPIO_RISINGDETECT) |= (1 << pinNumber); in am33xx_pin_attach_irq()
210 REG32(baseAdd + GPIO_FALLINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
213 REG32(baseAdd + GPIO_LEVELDETECT(0)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
216 REG32(baseAdd + GPIO_LEVELDETECT(1)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
220 REG32(baseAdd + GPIO_RISINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
223 REG32(baseAdd + GPIO_FALLINGDETECT) |= (1 << pinNumber); in am33xx_pin_attach_irq()
226 REG32(baseAdd + GPIO_LEVELDETECT(0)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
229 REG32(baseAdd + GPIO_LEVELDETECT(1)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
233 REG32(baseAdd + GPIO_RISINGDETECT) |= (1 << pinNumber); in am33xx_pin_attach_irq()
236 REG32(baseAdd + GPIO_FALLINGDETECT) |= (1 << pinNumber); in am33xx_pin_attach_irq()
239 REG32(baseAdd + GPIO_LEVELDETECT(0)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
242 REG32(baseAdd + GPIO_LEVELDETECT(1)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
246 REG32(baseAdd + GPIO_LEVELDETECT(0)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
249 REG32(baseAdd + GPIO_LEVELDETECT(1)) |= (1 << pinNumber); in am33xx_pin_attach_irq()
252 REG32(baseAdd + GPIO_RISINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
255 REG32(baseAdd + GPIO_FALLINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
259 REG32(baseAdd + GPIO_LEVELDETECT(0)) |= (1 << pinNumber); in am33xx_pin_attach_irq()
262 REG32(baseAdd + GPIO_LEVELDETECT(1)) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
265 REG32(baseAdd + GPIO_RISINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
268 REG32(baseAdd + GPIO_FALLINGDETECT) &= ~(1 << pinNumber); in am33xx_pin_attach_irq()
280 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_detach_irq() local
281 struct am33xx_pin_irq_hdr *irq_hdr = &GPIO_PARAMx[gpiox].hdr_tab[pinNumber]; in am33xx_pin_detach_irq()
297 rt_base_t pinNumber = pin & 0x1F; in am33xx_pin_irq_enable() local
302 REG32(baseAdd + GPIO_IRQSTATUS_SET(intLine)) = (1 << pinNumber); in am33xx_pin_irq_enable()
304 REG32(baseAdd + GPIO_IRQSTATUS_CLR(intLine)) = (1 << pinNumber); in am33xx_pin_irq_enable()
313 rt_base_t pinNumber; in am33xx_pin_get() local
324 pinNumber = name[3] - '0'; in am33xx_pin_get()
331 pinNumber *= 10; in am33xx_pin_get()
332 pinNumber += name[4] - '0'; in am33xx_pin_get()
338 if (pinNumber > 0x1F) in am33xx_pin_get()
341 return GET_PIN(gpiox, pinNumber); in am33xx_pin_get()