Lines Matching refs:ab32_hwtimer_obj
48 static struct ab32_hwtimer ab32_hwtimer_obj[] = variable
224 if (ab32_hwtimer_obj[TIM2_INDEX].tim_handle[TMRxCON] != 0) { in timer2_4_5_isr()
225 ab32_hwtimer_obj[TIM2_INDEX].tim_handle[TMRxCPND] = BIT(9); in timer2_4_5_isr()
226 _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM2_INDEX].time_device); in timer2_4_5_isr()
230 if (ab32_hwtimer_obj[TIM4_INDEX].tim_handle[TMRxCON] != 0) { in timer2_4_5_isr()
231 ab32_hwtimer_obj[TIM4_INDEX].tim_handle[TMRxCPND] = BIT(9); in timer2_4_5_isr()
232 _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM4_INDEX].time_device); in timer2_4_5_isr()
236 if (ab32_hwtimer_obj[TIM5_INDEX].tim_handle[TMRxCON] != 0) { in timer2_4_5_isr()
237 ab32_hwtimer_obj[TIM5_INDEX].tim_handle[TMRxCPND] = BIT(9); in timer2_4_5_isr()
238 _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM5_INDEX].time_device); in timer2_4_5_isr()
250 ab32_hwtimer_obj[TIM3_INDEX].tim_handle[TMRxCPND] = BIT(9); in timer3_isr()
251 _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM3_INDEX].time_device); in timer3_isr()
261 ab32_hwtimer_obj[TIM1_INDEX].tim_handle[TMRxCPND] = BIT(9); in timer1_isr()
262 _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM1_INDEX].time_device); in timer1_isr()
272 for (i = 0; i < sizeof(ab32_hwtimer_obj) / sizeof(ab32_hwtimer_obj[0]); i++) in ab32_hwtimer_init()
274 ab32_hwtimer_obj[i].time_device.info = &_info; in ab32_hwtimer_init()
275 ab32_hwtimer_obj[i].time_device.ops = &_ops; in ab32_hwtimer_init()
276 …if (rt_device_hwtimer_register(&ab32_hwtimer_obj[i].time_device, ab32_hwtimer_obj[i].name, (void *… in ab32_hwtimer_init()
278 LOG_D("%s register success", ab32_hwtimer_obj[i].name); in ab32_hwtimer_init()
282 LOG_E("%s register failed", ab32_hwtimer_obj[i].name); in ab32_hwtimer_init()