Lines Matching refs:edma_cc
330 static struct edma *edma_cc[EDMA_MAX_CC]; variable
348 queue_no = edma_cc[ctlr]->default_queue; in map_dmach_queue()
401 edma_cc[ctlr]->intr_data[lch].callback = callback; in setup_dma_interrupt()
402 edma_cc[ctlr]->intr_data[lch].data = data; in setup_dma_interrupt()
414 if (irq >= edma_cc[0]->irq_res_start && irq <= edma_cc[0]->irq_res_end) in irq2ctlr()
416 else if (irq >= edma_cc[1]->irq_res_start && in irq2ctlr()
417 irq <= edma_cc[1]->irq_res_end) in irq2ctlr()
464 if (edma_cc[ctlr]->intr_data[k].callback) in dma_irq_handler()
465 edma_cc[ctlr]->intr_data[k].callback( in dma_irq_handler()
467 edma_cc[ctlr]->intr_data[k]. in dma_irq_handler()
521 if (edma_cc[ctlr]->intr_data[k]. in dma_ccerr_handler()
523 edma_cc[ctlr]->intr_data[k]. in dma_ccerr_handler()
526 edma_cc[ctlr]->intr_data in dma_ccerr_handler()
601 for (i = start_slot; i < edma_cc[ctlr]->num_slots; ++i) { in reserve_contiguous_slots()
603 if (!test_and_set_bit(j, edma_cc[ctlr]->edma_inuse)) { in reserve_contiguous_slots()
631 if (i == edma_cc[ctlr]->num_slots) in reserve_contiguous_slots()
636 clear_bit(j, edma_cc[ctlr]->edma_inuse); in reserve_contiguous_slots()
659 edma_cc[ctlr]->edma_unused);
729 clear_bit(channel, edma_cc[ctlr]->edma_unused); in edma_alloc_channel()
736 channel = find_next_bit(edma_cc[i]->edma_unused, in edma_alloc_channel()
737 edma_cc[i]->num_channels, in edma_alloc_channel()
739 if (channel == edma_cc[i]->num_channels) in edma_alloc_channel()
742 edma_cc[i]->edma_inuse)) { in edma_alloc_channel()
754 } else if (channel >= edma_cc[ctlr]->num_channels) { in edma_alloc_channel()
756 } else if (test_and_set_bit(channel, edma_cc[ctlr]->edma_inuse)) { in edma_alloc_channel()
796 if (channel >= edma_cc[ctlr]->num_channels) in edma_free_channel()
804 clear_bit(channel, edma_cc[ctlr]->edma_inuse); in edma_free_channel()
828 slot = edma_cc[ctlr]->num_channels; in edma_alloc_slot()
830 slot = find_next_zero_bit(edma_cc[ctlr]->edma_inuse, in edma_alloc_slot()
831 edma_cc[ctlr]->num_slots, slot); in edma_alloc_slot()
832 if (slot == edma_cc[ctlr]->num_slots) in edma_alloc_slot()
834 if (!test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse)) in edma_alloc_slot()
837 } else if (slot < edma_cc[ctlr]->num_channels || in edma_alloc_slot()
838 slot >= edma_cc[ctlr]->num_slots) { in edma_alloc_slot()
840 } else if (test_and_set_bit(slot, edma_cc[ctlr]->edma_inuse)) { in edma_alloc_slot()
866 if (slot < edma_cc[ctlr]->num_channels || in edma_free_slot()
867 slot >= edma_cc[ctlr]->num_slots) in edma_free_slot()
872 clear_bit(slot, edma_cc[ctlr]->edma_inuse); in edma_free_slot()
910 (slot < edma_cc[ctlr]->num_channels || in edma_alloc_cont_slots()
911 slot >= edma_cc[ctlr]->num_slots)) in edma_alloc_cont_slots()
920 (edma_cc[ctlr]->num_slots - edma_cc[ctlr]->num_channels)) in edma_alloc_cont_slots()
926 edma_cc[ctlr]->num_channels); in edma_alloc_cont_slots()
958 if (slot < edma_cc[ctlr]->num_channels || in edma_free_cont_slots()
959 slot >= edma_cc[ctlr]->num_slots || in edma_free_cont_slots()
969 clear_bit(slot_to_free, edma_cc[ctlr]->edma_inuse); in edma_free_cont_slots()
999 if (slot < edma_cc[ctlr]->num_slots) { in edma_set_src()
1037 if (slot < edma_cc[ctlr]->num_slots) { in edma_set_dest()
1097 if (slot < edma_cc[ctlr]->num_slots) { in edma_set_src_index()
1123 if (slot < edma_cc[ctlr]->num_slots) { in edma_set_dest_index()
1170 if (slot < edma_cc[ctlr]->num_slots) { in edma_set_transfer_params()
1200 if (from >= edma_cc[ctlr_from]->num_slots) in edma_link()
1202 if (to >= edma_cc[ctlr_to]->num_slots) in edma_link()
1223 if (from >= edma_cc[ctlr]->num_slots) in edma_unlink()
1250 if (slot >= edma_cc[ctlr]->num_slots) in edma_write_slot()
1272 if (slot >= edma_cc[ctlr]->num_slots) in edma_read_slot()
1297 if (channel < edma_cc[ctlr]->num_channels) { in edma_pause()
1318 if (channel < edma_cc[ctlr]->num_channels) { in edma_resume()
1344 if (channel < edma_cc[ctlr]->num_channels) { in edma_start()
1349 if (test_bit(channel, edma_cc[ctlr]->edma_unused)) { in edma_start()
1390 if (channel < edma_cc[ctlr]->num_channels) { in edma_stop()
1429 if (channel < edma_cc[ctlr]->num_channels) { in edma_clean_channel()
1457 if (channel >= edma_cc[ctlr]->num_channels) in edma_clear_event()
1490 edma_cc[0] = rt_malloc(sizeof(struct edma)); in edma_init()
1491 if (!edma_cc[0]) { in edma_init()
1495 rt_memset(edma_cc[0], 0, sizeof(struct edma)); in edma_init()
1497 edma_cc[0]->num_channels = min_t(unsigned, info[0]->n_channel, in edma_init()
1499 edma_cc[0]->num_slots = min_t(unsigned, info[0]->n_slot, in edma_init()
1501 edma_cc[0]->num_cc = min_t(unsigned, info[0]->n_cc, in edma_init()
1504 edma_cc[0]->default_queue = info[0]->default_queue; in edma_init()
1505 if (!edma_cc[0]->default_queue) in edma_init()
1506 edma_cc[0]->default_queue = EVENTQ_1; in edma_init()
1511 for (i = 0; i < edma_cc[0]->num_slots; i++) in edma_init()
1516 rt_memset(edma_cc[0]->edma_unused, 0xff, in edma_init()
1517 sizeof(edma_cc[0]->edma_unused)); in edma_init()
1519 edma_cc[0]->irq_res_start = IRQ_CCINT0; in edma_init()
1523 edma_cc[0]->irq_res_end = IRQ_CCERRINT; in edma_init()
1531 for (i = 0; i < edma_cc[0]->num_channels; i++) in edma_init()
1573 rt_free(edma_cc[0]); in edma_init()