Lines Matching refs:hc32_device
439 struct hc32_pulse_encoder_tmra_device *hc32_device; in _tmra_pulse_encoder_init() local
440 hc32_device = (struct hc32_pulse_encoder_tmra_device *)pulse_encoder; in _tmra_pulse_encoder_init()
443 FCG_Fcg2PeriphClockCmd(hc32_device->u32PeriphClock, ENABLE); in _tmra_pulse_encoder_init()
448 stcTmraInit.hw_count.u16CountUpCond = hc32_device->hw_count.u16CountUpCond; in _tmra_pulse_encoder_init()
449 stcTmraInit.hw_count.u16CountDownCond = hc32_device->hw_count.u16CountDownCond; in _tmra_pulse_encoder_init()
450 stcTmraInit.u32PeriodValue = hc32_device->u32PeriodValue; in _tmra_pulse_encoder_init()
451 (void)TMRA_Init(hc32_device->tmr_handler, &stcTmraInit); in _tmra_pulse_encoder_init()
454 irq_config.irq_num = hc32_device->isr.enIRQn_Ovf; in _tmra_pulse_encoder_init()
455 irq_config.int_src = hc32_device->isr.enIntSrc_Ovf; in _tmra_pulse_encoder_init()
456 irq_config.irq_prio = hc32_device->isr.u8Int_Prio_Ovf; in _tmra_pulse_encoder_init()
458 hc32_install_irq_handler(&irq_config, hc32_device->isr.Irq_Ovf_Callback, RT_TRUE); in _tmra_pulse_encoder_init()
460 irq_config.irq_num = hc32_device->isr.enIRQn_Udf; in _tmra_pulse_encoder_init()
461 irq_config.int_src = hc32_device->isr.enIntSrc_Udf; in _tmra_pulse_encoder_init()
462 irq_config.irq_prio = hc32_device->isr.u8Int_Prio_Udf; in _tmra_pulse_encoder_init()
464 hc32_install_irq_handler(&irq_config, hc32_device->isr.Irq_Udf_Callback, RT_TRUE); in _tmra_pulse_encoder_init()
466 TMRA_IntCmd(hc32_device->tmr_handler, TMRA_INT_OVF | TMRA_INT_UDF, ENABLE); in _tmra_pulse_encoder_init()
476 struct hc32_pulse_encoder_tmra_device *hc32_device; in _tmra_pulse_encoder_clear_count() local
477 hc32_device = (struct hc32_pulse_encoder_tmra_device *)pulse_encoder; in _tmra_pulse_encoder_clear_count()
478 hc32_device->Over_Under_Flowcount = 0; in _tmra_pulse_encoder_clear_count()
479 if (READ_REG8_BIT(hc32_device->tmr_handler->BCSTRL, TMRA_BCSTRL_START) == TMRA_BCSTRL_START) in _tmra_pulse_encoder_clear_count()
483 TMRA_Stop(hc32_device->tmr_handler); in _tmra_pulse_encoder_clear_count()
484 TMRA_SetCountValue(hc32_device->tmr_handler, 0); in _tmra_pulse_encoder_clear_count()
487 TMRA_Start(hc32_device->tmr_handler); in _tmra_pulse_encoder_clear_count()
494 struct hc32_pulse_encoder_tmra_device *hc32_device; in _tmra_pulse_encoder_get_count() local
495 hc32_device = (struct hc32_pulse_encoder_tmra_device *)pulse_encoder; in _tmra_pulse_encoder_get_count()
496 …t32_t)((rt_int16_t)TMRA_GetCountValue(hc32_device->tmr_handler) + (hc32_device->Over_Under_Flowcou… in _tmra_pulse_encoder_get_count()
502 struct hc32_pulse_encoder_tmra_device *hc32_device; in _tmra_pulse_encoder_control() local
503 hc32_device = (struct hc32_pulse_encoder_tmra_device *)pulse_encoder; in _tmra_pulse_encoder_control()
510 TMRA_Start(hc32_device->tmr_handler); in _tmra_pulse_encoder_control()
514 TMRA_Stop(hc32_device->tmr_handler); in _tmra_pulse_encoder_control()
938 struct hc32_pulse_encoder_tmr6_device *hc32_device; in _tmr6_pulse_encoder_init() local
939 hc32_device = (struct hc32_pulse_encoder_tmr6_device *)pulse_encoder; in _tmr6_pulse_encoder_init()
942 FCG_Fcg2PeriphClockCmd(hc32_device->u32PeriphClock, ENABLE); in _tmr6_pulse_encoder_init()
947 stcTmr6Init.hw_count.u32CountUpCond = hc32_device->hw_count.u32CountUpCond; in _tmr6_pulse_encoder_init()
948 stcTmr6Init.hw_count.u32CountDownCond = hc32_device->hw_count.u32CountDownCond; in _tmr6_pulse_encoder_init()
949 stcTmr6Init.u32PeriodValue = hc32_device->u32PeriodValue; in _tmr6_pulse_encoder_init()
950 (void)TMR6_Init(hc32_device->tmr_handler, &stcTmr6Init); in _tmr6_pulse_encoder_init()
953 irq_config.irq_num = hc32_device->isr.enIRQn_Ovf; in _tmr6_pulse_encoder_init()
954 irq_config.int_src = hc32_device->isr.enIntSrc_Ovf; in _tmr6_pulse_encoder_init()
955 irq_config.irq_prio = hc32_device->isr.u8Int_Prio_Ovf; in _tmr6_pulse_encoder_init()
957 hc32_install_irq_handler(&irq_config, hc32_device->isr.Irq_Ovf_Callback, RT_TRUE); in _tmr6_pulse_encoder_init()
959 irq_config.irq_num = hc32_device->isr.enIRQn_Udf; in _tmr6_pulse_encoder_init()
960 irq_config.int_src = hc32_device->isr.enIntSrc_Udf; in _tmr6_pulse_encoder_init()
961 irq_config.irq_prio = hc32_device->isr.u8Int_Prio_Udf; in _tmr6_pulse_encoder_init()
963 hc32_install_irq_handler(&irq_config, hc32_device->isr.Irq_Udf_Callback, RT_TRUE); in _tmr6_pulse_encoder_init()
965 TMR6_IntCmd(hc32_device->tmr_handler, TMR6_INT_OVF | TMR6_INT_UDF, ENABLE); in _tmr6_pulse_encoder_init()
975 struct hc32_pulse_encoder_tmr6_device *hc32_device; in _tmr6_pulse_encoder_clear_count() local
976 hc32_device = (struct hc32_pulse_encoder_tmr6_device *)pulse_encoder; in _tmr6_pulse_encoder_clear_count()
977 hc32_device->Over_Under_Flowcount = 0; in _tmr6_pulse_encoder_clear_count()
978 if (READ_REG32_BIT(hc32_device->tmr_handler->GCONR, TMR6_GCONR_START) == TMR6_GCONR_START) in _tmr6_pulse_encoder_clear_count()
982 TMR6_Stop(hc32_device->tmr_handler); in _tmr6_pulse_encoder_clear_count()
983 TMR6_SetCountValue(hc32_device->tmr_handler, 0); in _tmr6_pulse_encoder_clear_count()
986 TMR6_Start(hc32_device->tmr_handler); in _tmr6_pulse_encoder_clear_count()
993 struct hc32_pulse_encoder_tmr6_device *hc32_device; in _tmr6_pulse_encoder_get_count() local
994 hc32_device = (struct hc32_pulse_encoder_tmr6_device *)pulse_encoder; in _tmr6_pulse_encoder_get_count()
995 …t32_t)((rt_int16_t)TMR6_GetCountValue(hc32_device->tmr_handler) + (hc32_device->Over_Under_Flowcou… in _tmr6_pulse_encoder_get_count()
1001 struct hc32_pulse_encoder_tmr6_device *hc32_device; in _tmr6_pulse_encoder_control() local
1002 hc32_device = (struct hc32_pulse_encoder_tmr6_device *)pulse_encoder; in _tmr6_pulse_encoder_control()
1009 TMR6_Start(hc32_device->tmr_handler); in _tmr6_pulse_encoder_control()
1013 TMR6_Stop(hc32_device->tmr_handler); in _tmr6_pulse_encoder_control()