Lines Matching refs:ASSERT
95 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet()
96 ASSERT((ulConfig & ~(LPC_CFG_WAKE)) == 0); in LPCConfigSet()
128 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet()
158 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet()
159 ASSERT((ulAddress & ~0xFFFFFFFE) == 0); in LPCStatusBlockAddressSet()
185 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet()
217 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet()
267 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert()
268 ASSERT(ulCount <= 3); in LPCSCIAssert()
314 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig()
367 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet()
405 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear()
439 ASSERT(ulBase == LPC0_BASE); in LPCIRQGet()
465 ASSERT(ulBase == LPC0_BASE); in LPCIRQSend()
499 ASSERT(ulBase == LPC0_BASE); in LPCIntRegister()
500 ASSERT(pfnHandler != 0); in LPCIntRegister()
535 ASSERT(ulBase == LPC0_BASE); in LPCIntUnregister()
576 ASSERT(ulBase == LPC0_BASE); in LPCIntEnable()
607 ASSERT(ulBase == LPC0_BASE); in LPCIntDisable()
642 ASSERT(ulBase == LPC0_BASE); in LPCIntStatus()
690 ASSERT(ulBase == LPC0_BASE); in LPCIntClear()
721 ASSERT(ulBase == LPC0_BASE); in LPCChannelEnable()
722 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelEnable()
751 ASSERT(ulBase == LPC0_BASE); in LPCChannelDisable()
752 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelDisable()
785 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigEPSet()
786 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigEPSet()
787 ASSERT((ulConfig & ~(LPC_CH0CTL_IRQSEL1_M | LPC_CH0CTL_IRQSEL0_M | in LPCChannelConfigEPSet()
789 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigEPSet()
790 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigEPSet()
837 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigMBSet()
838 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigMBSet()
839 ASSERT((ulConfig & ~(LPC_CH0CTL_IRQSEL1_M | LPC_CH0CTL_IRQSEL1_M | in LPCChannelConfigMBSet()
844 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigMBSet()
845 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigMBSet()
900 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigCOMxSet()
901 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigCOMxSet()
902 ASSERT(ulChannel == LPC_CHAN_COMx); in LPCChannelConfigCOMxSet()
903 ASSERT((ulConfig & ~(LPC_CH7CTL_IRQSEL1_M | LPC_CH7CTL_IRQSEL0_M | in LPCChannelConfigCOMxSet()
906 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigCOMxSet()
907 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigCOMxSet()
909 ASSERT((ulCOMxMode & ~LPC_DMACX_CXACT_M) == 0); in LPCChannelConfigCOMxSet()
965 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigGet()
966 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigGet()
1025 ASSERT(ulBase == LPC0_BASE); in LPCChannelPoolAddressGet()
1026 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelPoolAddressGet()
1071 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusGet()
1072 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusGet()
1103 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusSet()
1104 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusSet()
1105 ASSERT((ulStatus & (~LPC_CH0ST_USER_M)) == 0); in LPCChannelStatusSet()
1139 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusClear()
1140 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusClear()
1141 ASSERT((ulStatus & (~LPC_CH0ST_USER_M)) == 0); in LPCChannelStatusClear()
1175 ASSERT(ulBase == LPC0_BASE); in LPCChannelDMAConfigSet()
1176 ASSERT((ulConfig & ~0x000000FF) == 0); in LPCChannelDMAConfigSet()
1177 ASSERT((ulConfig & 0x00000003) != 0x00000003); in LPCChannelDMAConfigSet()
1178 ASSERT((ulConfig & 0x0000000C) != 0x0000000C); in LPCChannelDMAConfigSet()
1179 ASSERT((ulConfig & 0x00000030) != 0x00000030); in LPCChannelDMAConfigSet()
1180 ASSERT((ulConfig & 0x000000C0) != 0x000000C0); in LPCChannelDMAConfigSet()
1181 ASSERT((ulMask & ~0x000000FF) == 0); in LPCChannelDMAConfigSet()
1209 ASSERT(ulBase == LPC0_BASE); in LPCChannelDMAConfigGet()
1236 ASSERT(ulBase == LPC0_BASE); in LPCByteRead()
1237 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCByteRead()
1267 ASSERT(ulBase == LPC0_BASE); in LPCByteWrite()
1268 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCByteWrite()
1297 ASSERT(ulBase == LPC0_BASE); in LPCHalfWordRead()
1298 ASSERT((ulOffset & 1) == 0); in LPCHalfWordRead()
1299 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCHalfWordRead()
1330 ASSERT(ulBase == LPC0_BASE); in LPCHalfWordWrite()
1331 ASSERT((ulOffset & 1) == 0); in LPCHalfWordWrite()
1332 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCHalfWordWrite()
1361 ASSERT(ulBase == LPC0_BASE); in LPCWordRead()
1362 ASSERT((ulOffset & 3) == 0); in LPCWordRead()
1363 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCWordRead()
1394 ASSERT(ulBase == LPC0_BASE); in LPCWordWrite()
1395 ASSERT((ulOffset & 1) == 0); in LPCWordWrite()
1396 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCWordWrite()
1424 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntEnable()
1425 ASSERT((ulIntFlags & ~(LPC_DMACX_CXEM | LPC_DMACX_CXTXEM | in LPCCOMxIntEnable()
1453 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntDisable()
1454 ASSERT((ulIntFlags & ~(LPC_DMACX_CXEM | LPC_DMACX_CXTXEM | in LPCCOMxIntDisable()
1484 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntStatus()
1518 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntClear()
1519 ASSERT((ulIntFlags & ~(LPC_DMACX_CXRES | LPC_DMACX_CXTXRES | in LPCCOMxIntClear()