Lines Matching refs:ulBase
71 I2CMasterBaseValid(unsigned long ulBase) in I2CMasterBaseValid() argument
73 return((ulBase == I2C0_MASTER_BASE) || (ulBase == I2C1_MASTER_BASE) || in I2CMasterBaseValid()
74 (ulBase == I2C2_MASTER_BASE) || (ulBase == I2C3_MASTER_BASE) || in I2CMasterBaseValid()
75 (ulBase == I2C4_MASTER_BASE) || (ulBase == I2C5_MASTER_BASE)); in I2CMasterBaseValid()
94 I2CSlaveBaseValid(unsigned long ulBase) in I2CSlaveBaseValid() argument
96 return((ulBase == I2C0_SLAVE_BASE) || (ulBase == I2C1_SLAVE_BASE) || in I2CSlaveBaseValid()
97 (ulBase == I2C2_SLAVE_BASE) || (ulBase == I2C3_SLAVE_BASE) || in I2CSlaveBaseValid()
98 (ulBase == I2C4_SLAVE_BASE) || (ulBase == I2C5_SLAVE_BASE)); in I2CSlaveBaseValid()
116 I2CIntNumberGet(unsigned long ulBase) in I2CIntNumberGet() argument
130 if(g_ppulI2CIntMap[ulIdx][0] == ulBase) in I2CIntNumberGet()
173 I2CMasterInitExpClk(unsigned long ulBase, unsigned long ulI2CClk, in I2CMasterInitExpClk() argument
182 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterInitExpClk()
187 I2CMasterEnable(ulBase); in I2CMasterInitExpClk()
208 HWREG(ulBase + I2C_O_MTPR) = ulTPR; in I2CMasterInitExpClk()
228 I2CSlaveInit(unsigned long ulBase, unsigned char ucSlaveAddr) in I2CSlaveInit() argument
233 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveInit()
239 I2CSlaveEnable(ulBase); in I2CSlaveInit()
244 HWREG(ulBase + I2C_O_SOAR) = ucSlaveAddr; in I2CSlaveInit()
266 I2CSlaveAddressSet(unsigned long ulBase, unsigned char ucAddrNum, in I2CSlaveAddressSet() argument
272 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveAddressSet()
286 HWREG(ulBase + I2C_O_SOAR) = ucSlaveAddr; in I2CSlaveAddressSet()
295 HWREG(ulBase + I2C_O_SOAR2) = I2C_SOAR2_OAR2EN | ucSlaveAddr; in I2CSlaveAddressSet()
313 I2CMasterEnable(unsigned long ulBase) in I2CMasterEnable() argument
318 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterEnable()
323 HWREG(ulBase + I2C_O_MCR) |= I2C_MCR_MFE; in I2CMasterEnable()
338 I2CSlaveEnable(unsigned long ulBase) in I2CSlaveEnable() argument
343 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveEnable()
348 HWREG(ulBase - I2C0_SLAVE_BASE + I2C0_MASTER_BASE + I2C_O_MCR) |= in I2CSlaveEnable()
354 HWREG(ulBase + I2C_O_SCSR) = I2C_SCSR_DA; in I2CSlaveEnable()
369 I2CMasterDisable(unsigned long ulBase) in I2CMasterDisable() argument
374 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDisable()
379 HWREG(ulBase + I2C_O_MCR) &= ~(I2C_MCR_MFE); in I2CMasterDisable()
394 I2CSlaveDisable(unsigned long ulBase) in I2CSlaveDisable() argument
399 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDisable()
404 HWREG(ulBase + I2C_O_SCSR) = 0; in I2CSlaveDisable()
409 HWREG(ulBase - I2C0_SLAVE_BASE + I2C0_MASTER_BASE + I2C_O_MCR) &= in I2CSlaveDisable()
435 I2CIntRegister(unsigned long ulBase, void (*pfnHandler)(void)) in I2CIntRegister() argument
442 ASSERT(I2CMasterBaseValid(ulBase)); in I2CIntRegister()
447 ulInt = I2CIntNumberGet(ulBase); in I2CIntRegister()
477 I2CIntUnregister(unsigned long ulBase) in I2CIntUnregister() argument
484 ASSERT(I2CMasterBaseValid(ulBase)); in I2CIntUnregister()
489 ulInt = I2CIntNumberGet(ulBase); in I2CIntUnregister()
514 I2CMasterIntEnable(unsigned long ulBase) in I2CMasterIntEnable() argument
519 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntEnable()
524 HWREG(ulBase + I2C_O_MIMR) = 1; in I2CMasterIntEnable()
551 I2CMasterIntEnableEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CMasterIntEnableEx() argument
556 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntEnableEx()
561 HWREG(ulBase + I2C_O_MIMR) |= ulIntFlags; in I2CMasterIntEnableEx()
576 I2CSlaveIntEnable(unsigned long ulBase) in I2CSlaveIntEnable() argument
581 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnable()
586 HWREG(ulBase + I2C_O_SIMR) |= I2C_SLAVE_INT_DATA; in I2CSlaveIntEnable()
614 I2CSlaveIntEnableEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CSlaveIntEnableEx() argument
619 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnableEx()
624 HWREG(ulBase + I2C_O_SIMR) |= ulIntFlags; in I2CSlaveIntEnableEx()
639 I2CMasterIntDisable(unsigned long ulBase) in I2CMasterIntDisable() argument
644 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntDisable()
649 HWREG(ulBase + I2C_O_MIMR) = 0; in I2CMasterIntDisable()
670 I2CMasterIntDisableEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CMasterIntDisableEx() argument
675 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntDisableEx()
680 HWREG(ulBase + I2C_O_MIMR) &= ~ulIntFlags; in I2CMasterIntDisableEx()
695 I2CSlaveIntDisable(unsigned long ulBase) in I2CSlaveIntDisable() argument
700 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntDisable()
705 HWREG(ulBase + I2C_O_SIMR) &= ~I2C_SLAVE_INT_DATA; in I2CSlaveIntDisable()
726 I2CSlaveIntDisableEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CSlaveIntDisableEx() argument
731 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntDisableEx()
736 HWREG(ulBase + I2C_O_SIMR) &= ~ulIntFlags; in I2CSlaveIntDisableEx()
756 I2CMasterIntStatus(unsigned long ulBase, tBoolean bMasked) in I2CMasterIntStatus() argument
761 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntStatus()
769 return((HWREG(ulBase + I2C_O_MMIS)) ? true : false); in I2CMasterIntStatus()
773 return((HWREG(ulBase + I2C_O_MRIS)) ? true : false); in I2CMasterIntStatus()
794 I2CMasterIntStatusEx(unsigned long ulBase, tBoolean bMasked) in I2CMasterIntStatusEx() argument
799 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntStatusEx()
807 return(HWREG(ulBase + I2C_O_MMIS)); in I2CMasterIntStatusEx()
811 return(HWREG(ulBase + I2C_O_MRIS)); in I2CMasterIntStatusEx()
832 I2CSlaveIntStatus(unsigned long ulBase, tBoolean bMasked) in I2CSlaveIntStatus() argument
837 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntStatus()
845 return((HWREG(ulBase + I2C_O_SMIS)) ? true : false); in I2CSlaveIntStatus()
849 return((HWREG(ulBase + I2C_O_SRIS)) ? true : false); in I2CSlaveIntStatus()
870 I2CSlaveIntStatusEx(unsigned long ulBase, tBoolean bMasked) in I2CSlaveIntStatusEx() argument
877 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntStatusEx()
891 ulValue = HWREG(ulBase + I2C_O_SRIS); in I2CSlaveIntStatusEx()
892 return(ulValue & HWREG(ulBase + I2C_O_SIMR)); in I2CSlaveIntStatusEx()
896 return(HWREG(ulBase + I2C_O_SMIS)); in I2CSlaveIntStatusEx()
901 return(HWREG(ulBase + I2C_O_SRIS)); in I2CSlaveIntStatusEx()
928 I2CMasterIntClear(unsigned long ulBase) in I2CMasterIntClear() argument
933 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntClear()
938 HWREG(ulBase + I2C_O_MICR) = I2C_MICR_IC; in I2CMasterIntClear()
945 HWREG(ulBase + I2C_O_MMIS) = I2C_MICR_IC; in I2CMasterIntClear()
975 I2CMasterIntClearEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CMasterIntClearEx() argument
980 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntClearEx()
985 HWREG(ulBase + I2C_O_MICR) = ulIntFlags; in I2CMasterIntClearEx()
1011 I2CSlaveIntClear(unsigned long ulBase) in I2CSlaveIntClear() argument
1016 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntClear()
1021 HWREG(ulBase + I2C_O_SICR) = I2C_SICR_DATAIC; in I2CSlaveIntClear()
1051 I2CSlaveIntClearEx(unsigned long ulBase, unsigned long ulIntFlags) in I2CSlaveIntClearEx() argument
1056 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntClearEx()
1061 HWREG(ulBase + I2C_O_SICR) = ulIntFlags; in I2CSlaveIntClearEx()
1082 I2CMasterSlaveAddrSet(unsigned long ulBase, unsigned char ucSlaveAddr, in I2CMasterSlaveAddrSet() argument
1088 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterSlaveAddrSet()
1094 HWREG(ulBase + I2C_O_MSA) = (ucSlaveAddr << 1) | bReceive; in I2CMasterSlaveAddrSet()
1114 I2CMasterLineStateGet(unsigned long ulBase) in I2CMasterLineStateGet() argument
1119 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterLineStateGet()
1124 return(HWREG(ulBase + I2C_O_MBMON)); in I2CMasterLineStateGet()
1141 I2CMasterBusy(unsigned long ulBase) in I2CMasterBusy() argument
1146 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterBusy()
1151 if(HWREG(ulBase + I2C_O_MCS) & I2C_MCS_BUSY) in I2CMasterBusy()
1176 I2CMasterBusBusy(unsigned long ulBase) in I2CMasterBusBusy() argument
1181 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterBusBusy()
1186 if(HWREG(ulBase + I2C_O_MCS) & I2C_MCS_BUSBSY) in I2CMasterBusBusy()
1222 I2CMasterControl(unsigned long ulBase, unsigned long ulCmd) in I2CMasterControl() argument
1227 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterControl()
1242 HWREG(ulBase + I2C_O_MCS) = ulCmd; in I2CMasterControl()
1260 I2CMasterErr(unsigned long ulBase) in I2CMasterErr() argument
1267 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterErr()
1272 ulErr = HWREG(ulBase + I2C_O_MCS); in I2CMasterErr()
1309 I2CMasterDataPut(unsigned long ulBase, unsigned char ucData) in I2CMasterDataPut() argument
1314 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDataPut()
1319 HWREG(ulBase + I2C_O_MDR) = ucData; in I2CMasterDataPut()
1335 I2CMasterDataGet(unsigned long ulBase) in I2CMasterDataGet() argument
1340 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDataGet()
1345 return(HWREG(ulBase + I2C_O_MDR)); in I2CMasterDataGet()
1367 I2CMasterTimeoutSet(unsigned long ulBase, unsigned long ulValue) in I2CMasterTimeoutSet() argument
1372 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterTimeoutSet()
1377 HWREG(ulBase + I2C_O_MCLKOCNT) = ulValue; in I2CMasterTimeoutSet()
1397 I2CSlaveACKOverride(unsigned long ulBase, tBoolean bEnable) in I2CSlaveACKOverride() argument
1402 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveACKOverride()
1409 HWREG(ulBase + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOEN; in I2CSlaveACKOverride()
1413 HWREG(ulBase + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOEN; in I2CSlaveACKOverride()
1432 I2CSlaveACKValueSet(unsigned long ulBase, tBoolean bACK) in I2CSlaveACKValueSet() argument
1437 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveACKValueSet()
1444 HWREG(ulBase + I2C_O_SACKCTL) &= ~I2C_SACKCTL_ACKOVAL; in I2CSlaveACKValueSet()
1448 HWREG(ulBase + I2C_O_SACKCTL) |= I2C_SACKCTL_ACKOVAL; in I2CSlaveACKValueSet()
1486 I2CSlaveStatus(unsigned long ulBase) in I2CSlaveStatus() argument
1491 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveStatus()
1496 return(HWREG(ulBase + I2C_O_SCSR)); in I2CSlaveStatus()
1512 I2CSlaveDataPut(unsigned long ulBase, unsigned char ucData) in I2CSlaveDataPut() argument
1517 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDataPut()
1522 HWREG(ulBase + I2C_O_SDR) = ucData; in I2CSlaveDataPut()
1538 I2CSlaveDataGet(unsigned long ulBase) in I2CSlaveDataGet() argument
1543 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDataGet()
1548 return(HWREG(ulBase + I2C_O_SDR)); in I2CSlaveDataGet()