Lines Matching refs:req
62 spimss_req_t *req; member
69 static int SPIMSS_TransSetup(mxc_spimss_regs_t *spi, spimss_req_t *req, int master);
70 static uint32_t SPIMSS_MasterTransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req);
71 static uint32_t SPIMSS_TransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req);
72 static uint32_t SPIMSS_SlaveTransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req);
93 states[spi_num].req = NULL; in SPIMSS_Init()
133 if (states[spi_num].req != NULL) { in SPIMSS_Shutdown()
136 temp_req = states[spi_num].req; in SPIMSS_Shutdown()
139 mxc_free_lock((uint32_t*)&states[spi_num].req); in SPIMSS_Shutdown()
158 int SPIMSS_TransSetup(mxc_spimss_regs_t *spi, spimss_req_t *req, int master) in SPIMSS_TransSetup() argument
168 if ((req->tx_data == NULL) && (req->rx_data == NULL)) { in SPIMSS_TransSetup()
175 if (req->len == 0) { in SPIMSS_TransSetup()
179 req->tx_num = 0; in SPIMSS_TransSetup()
180 req->rx_num = 0; in SPIMSS_TransSetup()
182 if (mxc_get_lock((uint32_t*)&states[spi_num].req, (uint32_t)req) != E_NO_ERROR) { in SPIMSS_TransSetup()
196 if (req->bits <16) { in SPIMSS_TransSetup()
197 … MXC_SETFIELD(spi->mod, MXC_F_SPIMSS_MOD_NUMBITS , req->bits << MXC_F_SPIMSS_MOD_NUMBITS_POS); in SPIMSS_TransSetup()
228 if (states[spi_num].req != NULL) { in SPIMSS_Handler()
230 int_enable = SPIMSS_MasterTransHandler(spi, states[spi_num].req); in SPIMSS_Handler()
233 int_enable = SPIMSS_SlaveTransHandler(spi, states[spi_num].req); in SPIMSS_Handler()
244 int SPIMSS_MasterTrans(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_MasterTrans() argument
248 if ((error = SPIMSS_TransSetup(spi, req, 1)) != E_NO_ERROR) { in SPIMSS_MasterTrans()
252 req->callback = NULL; in SPIMSS_MasterTrans()
257 while (SPIMSS_MasterTransHandler(spi,req)!=0) { in SPIMSS_MasterTrans()
269 int SPIMSS_SlaveTrans(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_SlaveTrans() argument
273 if ((error = SPIMSS_TransSetup(spi, req,0)) != E_NO_ERROR) { in SPIMSS_SlaveTrans()
277 while (SPIMSS_SlaveTransHandler(spi,req)!=0) { in SPIMSS_SlaveTrans()
288 int SPIMSS_MasterTransAsync(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_MasterTransAsync() argument
292 if ((error = SPIMSS_TransSetup(spi, req, 1) )!= E_NO_ERROR) { in SPIMSS_MasterTransAsync()
296 int_enable = SPIMSS_MasterTransHandler(spi,req); in SPIMSS_MasterTransAsync()
310 int SPIMSS_SlaveTransAsync(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_SlaveTransAsync() argument
314 if ((error = SPIMSS_TransSetup(spi, req, 0)) != E_NO_ERROR) { in SPIMSS_SlaveTransAsync()
318 int_enable = SPIMSS_SlaveTransHandler(spi,req); in SPIMSS_SlaveTransAsync()
330 uint32_t SPIMSS_MasterTransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_MasterTransHandler() argument
337 retval = SPIMSS_TransHandler(spi,req); in SPIMSS_MasterTransHandler()
344 uint32_t SPIMSS_SlaveTransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_SlaveTransHandler() argument
346 return SPIMSS_TransHandler(spi,req); in SPIMSS_SlaveTransHandler()
350 uint32_t SPIMSS_TransHandler(mxc_spimss_regs_t *spi, spimss_req_t *req) in SPIMSS_TransHandler() argument
355 uint32_t length =req->len; in SPIMSS_TransHandler()
361 if (req->rx_data != NULL) { in SPIMSS_TransHandler()
364 if ((length - req->rx_num) < rx_avail) { in SPIMSS_TransHandler()
365 rx_avail = (length - req->rx_num); in SPIMSS_TransHandler()
372 if (req->bits>8) { in SPIMSS_TransHandler()
373 ((uint16_t*)req->rx_data)[req->rx_num++] = spi->data16; in SPIMSS_TransHandler()
377 ((uint8_t*)req->rx_data)[req->rx_num++] = spi->data8[0]; in SPIMSS_TransHandler()
381 if ((length - req->rx_num) < rx_avail) { in SPIMSS_TransHandler()
382 rx_avail = (length - req->rx_num); in SPIMSS_TransHandler()
386 remain = length - req->rx_num; in SPIMSS_TransHandler()
399 if ((req->tx_data == NULL) && (req->rx_num == length)) { in SPIMSS_TransHandler()
402 mxc_free_lock((uint32_t*)&states[spi_num].req); in SPIMSS_TransHandler()
404 if (req->callback != NULL) { in SPIMSS_TransHandler()
405 req->callback(req, E_NO_ERROR); in SPIMSS_TransHandler()
411 if (req->tx_data != NULL) { in SPIMSS_TransHandler()
413 if (req->tx_num < length) { in SPIMSS_TransHandler()
418 if ((length - req->tx_num) < tx_avail) { in SPIMSS_TransHandler()
419 tx_avail = (length - req->tx_num); // This is for the last spin in SPIMSS_TransHandler()
421 if (req->bits > 8) { in SPIMSS_TransHandler()
426 if (req->bits >8) { in SPIMSS_TransHandler()
427 spi->data16 = ((uint16_t*)req->tx_data)[req->tx_num++]; in SPIMSS_TransHandler()
431 spi->data8[0] = ((uint8_t*)req->tx_data)[req->tx_num++]; in SPIMSS_TransHandler()
438 remain = length - req->tx_num; in SPIMSS_TransHandler()
452 if ((req->rx_data == NULL) && (req->tx_num == length)) { in SPIMSS_TransHandler()
455 mxc_free_lock((uint32_t*)&states[spi_num].req); in SPIMSS_TransHandler()
457 if (req->callback != NULL) { in SPIMSS_TransHandler()
458 req->callback(req, E_NO_ERROR); in SPIMSS_TransHandler()
465 if ((req->rx_num == length) && (req->tx_num == length)) { in SPIMSS_TransHandler()
468 mxc_free_lock((uint32_t*)&states[spi_num].req); in SPIMSS_TransHandler()
470 if (req->callback != NULL) { in SPIMSS_TransHandler()
471 req->callback(req, E_NO_ERROR); in SPIMSS_TransHandler()
479 int SPIMSS_AbortAsync(spimss_req_t *req) in SPIMSS_AbortAsync() argument
485 if (req == NULL) { in SPIMSS_AbortAsync()
491 if (req == states[spi_num].req) { in SPIMSS_AbortAsync()
502 mxc_free_lock((uint32_t*)&states[spi_num].req); in SPIMSS_AbortAsync()
505 if (req->callback != NULL) { in SPIMSS_AbortAsync()
506 req->callback(req, E_ABORT); in SPIMSS_AbortAsync()