Lines Matching refs:hw_base
35 rt_uint32_t hw_base; member
43 writel(uart->hw_base + UBRDIV_OFS, PCLK_HZ / (cfg->baud_rate * 16)); in s3c2440_serial_configure()
45 writel(uart->hw_base + ULCON_OFS, 0x03);// 8bit data, 1bit stop, No parity in s3c2440_serial_configure()
46 writel(uart->hw_base + UCON_OFS, 0x05); in s3c2440_serial_configure()
47 writel(uart->hw_base + UFCON_OFS, 0x00); in s3c2440_serial_configure()
48 writel(uart->hw_base + UMCON_OFS, 0x00); in s3c2440_serial_configure()
94 while (!(readl(uart->hw_base + UTRSTAT_OFS) & (1 << 2))) in s3c2440_putc()
98 writel(uart->hw_base + UTXH_OFS, c); in s3c2440_putc()
109 if (readl(uart->hw_base + UTRSTAT_OFS) & (1 << 0)) in s3c2440_getc()
111 ch = readl(uart->hw_base + URXH_OFS) & 0x000000FF; in s3c2440_getc()
156 .hw_base = 0x50000000,
169 .hw_base = 0x50004000,
182 .hw_base = 0x50008000,