Lines Matching refs:RCC
188 RCC->CR |= (uint32_t)0x00000001; in SystemInit()
191 RCC->CFGR &= (uint32_t)0xF8FF000C; in SystemInit()
194 RCC->CR &= (uint32_t)0xFEF6FFFF; in SystemInit()
197 RCC->CR &= (uint32_t)0xFFFBFFFF; in SystemInit()
200 RCC->CFGR &= (uint32_t)0xFF80FFFF; in SystemInit()
201 RCC->CR &= (uint32_t)0x000FFFFF; in SystemInit()
204 RCC->CIR = 0x009F0000; in SystemInit()
267 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockToHSE()
272 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockToHSE()
284 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockToHSE()
301 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockToHSE()
304 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockToHSE()
307 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; in SetSysClockToHSE()
310 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockToHSE()
311 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; in SetSysClockToHSE()
314 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) in SetSysClockToHSE()
340 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo24()
345 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo24()
357 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo24()
375 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo24()
378 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo24()
381 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; in SetSysClockTo24()
384 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo24()
385 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo24()
387 RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC ; in SetSysClockTo24()
388 RCC->CR |= 0x08000000;//pll=3/1 in SetSysClockTo24()
393 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo24()
396 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo24()
401 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo24()
402 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo24()
405 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo24()
431 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo36()
436 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo36()
448 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo36()
466 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo36()
469 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo36()
472 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; in SetSysClockTo36()
475 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo36()
476 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo36()
478 RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC ; in SetSysClockTo36()
479 RCC->CR |= 0x20100000;//pll = 9/2 in SetSysClockTo36()
484 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo36()
487 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo36()
492 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo36()
493 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo36()
496 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo36()
521 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo48()
526 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo48()
538 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo48()
555 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo48()
558 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo48()
561 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; in SetSysClockTo48()
564 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo48()
565 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo48()
567 RCC->CFGR |= (uint32_t ) RCC_CFGR_PLLSRC ; in SetSysClockTo48()
568 RCC->CR |= 0x14000000;//pll = 6/1 in SetSysClockTo48()
573 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo48()
576 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo48()
581 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo48()
582 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo48()
585 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo48()
611 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo56()
616 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo56()
628 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo56()
646 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo56()
649 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo56()
652 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; in SetSysClockTo56()
655 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo56()
656 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo56()
658 RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC ; in SetSysClockTo56()
659 RCC->CR |= 0x18000000;//pll = 7/1 in SetSysClockTo56()
664 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo56()
667 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo56()
672 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo56()
673 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo56()
676 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo56()
702 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo72()
707 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo72()
719 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo72()
736 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo72()
739 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo72()
742 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; in SetSysClockTo72()
745 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo72()
746 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo72()
748 RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC ; in SetSysClockTo72()
750 RCC->CR |= (1 << 20) | (17 << 26); //pll = 9/1 in SetSysClockTo72()
755 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo72()
758 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo72()
763 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo72()
764 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo72()
767 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo72()
793 RCC->CR |= ((uint32_t)RCC_CR_HSEON); in SetSysClockTo96()
798 HSEStatus = RCC->CR & RCC_CR_HSERDY; in SetSysClockTo96()
810 if ((RCC->CR & RCC_CR_HSERDY) != RESET) in SetSysClockTo96()
827 RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; in SetSysClockTo96()
830 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; in SetSysClockTo96()
833 RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; in SetSysClockTo96()
836 RCC->CFGR &= (uint32_t)0xFFFCFFFF; in SetSysClockTo96()
837 RCC->CR &= (uint32_t)0x000FFFFF; in SetSysClockTo96()
839 RCC->CFGR |= (uint32_t)RCC_CFGR_PLLSRC ; in SetSysClockTo96()
840 RCC->CR |= 0x2C000000;//pll = 12/1 in SetSysClockTo96()
845 RCC->CR |= RCC_CR_PLLON; in SetSysClockTo96()
848 while((RCC->CR & RCC_CR_PLLRDY) == 0) in SetSysClockTo96()
853 RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); in SetSysClockTo96()
854 RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; in SetSysClockTo96()
857 while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) in SetSysClockTo96()
875 RCC->CR |= RCC_CR_HSION; in SetSysClockTo48_HSI()
876 while(!(RCC->CR & RCC_CR_HSIRDY)); in SetSysClockTo48_HSI()
877 RCC->CFGR = RCC_CFGR_PPRE1_2; //APB1=DIV2;APB2=DIV1;AHB=DIV1; in SetSysClockTo48_HSI()
879 RCC->CFGR &= ~RCC_CFGR_PLLSRC; //PLLSRC ON in SetSysClockTo48_HSI()
881 RCC->CR &= ~(RCC_CR_PLLON); //��PLL// RCC->CR &=~(7<<20); //��PLL in SetSysClockTo48_HSI()
883 RCC->CR &= ~(0x1f << 26); in SetSysClockTo48_HSI()
884 RCC->CR |= (4 - 1) << 26; //����PLLֵ 2~16 in SetSysClockTo48_HSI()
888 RCC->CR |= RCC_CR_PLLON; //PLLON in SetSysClockTo48_HSI()
889 while(!(RCC->CR & RCC_CR_PLLRDY)); //�ȴ�PLL���� in SetSysClockTo48_HSI()
890 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo48_HSI()
891 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo48_HSI()
894 temp = RCC->CFGR >> 2; in SetSysClockTo48_HSI()
902 RCC->CR |= RCC_CR_HSION; in SetSysClockTo72_HSI()
903 while(!(RCC->CR & RCC_CR_HSIRDY)); in SetSysClockTo72_HSI()
904 RCC->CFGR = RCC_CFGR_PPRE1_2; //APB1=DIV2;APB2=DIV1;AHB=DIV1; in SetSysClockTo72_HSI()
906 RCC->CFGR &= ~RCC_CFGR_PLLSRC; //PLLSRC ON in SetSysClockTo72_HSI()
908 RCC->CR &= ~(RCC_CR_PLLON); //��PLL// RCC->CR &=~(7<<20); //��PLL in SetSysClockTo72_HSI()
910 RCC->CR &= ~(0x1f << 26); in SetSysClockTo72_HSI()
911 RCC->CR |= (6 - 1) << 26; //����PLLֵ 2~16 in SetSysClockTo72_HSI()
915 RCC->CR |= RCC_CR_PLLON; //PLLON in SetSysClockTo72_HSI()
916 while(!(RCC->CR & RCC_CR_PLLRDY)); //�ȴ�PLL���� in SetSysClockTo72_HSI()
917 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo72_HSI()
918 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo72_HSI()
921 temp = RCC->CFGR >> 2; in SetSysClockTo72_HSI()
929 RCC->CR |= RCC_CR_HSION; in SetSysClockTo96_HSI()
930 while(!(RCC->CR & RCC_CR_HSIRDY)); in SetSysClockTo96_HSI()
931 RCC->CFGR = RCC_CFGR_PPRE1_2; //APB1=DIV2;APB2=DIV1;AHB=DIV1; in SetSysClockTo96_HSI()
933 RCC->CFGR &= ~RCC_CFGR_PLLSRC; //PLLSRC ON in SetSysClockTo96_HSI()
935 RCC->CR &= ~(RCC_CR_PLLON); //��PLL// RCC->CR &=~(7<<20); //��PLL in SetSysClockTo96_HSI()
937 RCC->CR &= ~(0x1f << 26); in SetSysClockTo96_HSI()
938 RCC->CR |= (8 - 1) << 26; //����PLLֵ 2~16 in SetSysClockTo96_HSI()
942 RCC->CR |= RCC_CR_PLLON; //PLLON in SetSysClockTo96_HSI()
943 while(!(RCC->CR & RCC_CR_PLLRDY)); //�ȴ�PLL���� in SetSysClockTo96_HSI()
944 RCC->CFGR &= ~RCC_CFGR_SW; in SetSysClockTo96_HSI()
945 RCC->CFGR |= RCC_CFGR_SW_PLL; //PLL��Ϊϵͳʱ�� in SetSysClockTo96_HSI()
948 temp = RCC->CFGR >> 2; in SetSysClockTo96_HSI()