Lines Matching refs:uint32
33 #define flash1bitError (*(volatile uint32 *)(0xF00803F0U))
34 #define flash2bitError (*(volatile uint32 *)(0xF00803F8U))
36 #define tcramA1bitError (*(volatile uint32 *)(0x08400000U))
37 #define tcramA2bitError (*(volatile uint32 *)(0x08400010U))
39 #define tcramB1bitError (*(volatile uint32 *)(0x08400008U))
40 #define tcramB2bitError (*(volatile uint32 *)(0x08400018U))
42 #define tcramA1bit (*(volatile uint32 *)(0x08000000U))
43 #define tcramA2bit (*(volatile uint32 *)(0x08000010U))
45 #define tcramB1bit (*(volatile uint32 *)(0x08000008U))
46 #define tcramB2bit (*(volatile uint32 *)(0x08000018U))
48 #define flashBadECC (*(volatile uint32 *)(0x20040000U))
50 #define CCMSR (*(volatile uint32 *)(0xFFFFF600U))
51 #define CCMKEYR (*(volatile uint32 *)(0xFFFFF604U))
54 #define DMA_PARCR (*(volatile uint32 *)(0xFFFFF1A8U))
55 #define DMA_PARADDR (*(volatile uint32 *)(0xFFFFF1ACU))
57 #define DMARAMLOC (*(volatile uint32 *)(0xFFF80000U))
58 #define DMARAMPARLOC (*(volatile uint32 *)(0xFFF80A00U))
124 uint32 CONFIG_RAMT;
125 uint32 CONFIG_DLR;
126 uint32 CONFIG_PACT;
127 uint32 CONFIG_PBISTID;
128 uint32 CONFIG_OVER;
129 uint32 CONFIG_FSRDL1;
130 uint32 CONFIG_ROM;
131 uint32 CONFIG_ALGO;
132 uint32 CONFIG_RINFOL;
133 uint32 CONFIG_RINFOU;
161 void memoryPort0TestFailNotification(uint32 groupSelect, uint32 dataSelect, uint32 address, uint32 …
172 void memoryPort1TestFailNotification(uint32 groupSelect, uint32 dataSelect, uint32 address, uint32 …
191 uint32 CONFIG_STCGCR0;
192 uint32 CONFIG_STCGCR1;
193 uint32 CONFIG_STCTPR;
194 uint32 CONFIG_STCSCSCR;
304 uint32 CONFIG_BOUNDARY;
305 uint32 CONFIG_PINS;
306 uint32 CONFIG_SELFTESTCYCLES;
307 uint32 CONFIG_SELFTESTSIGN;
321 void ccmFail(uint32 x);
325 void cpuSelfTest(uint32 no_of_intervals, uint32 max_timeout, boolean restart_test);
328 void memoryInit(uint32 ram);
331 void pbistRun(uint32 raminfoL, uint32 algomask);
336 boolean pbistPortTestStatus(uint32 port);
380 uint32 CONFIG_CCMKEYR;