Lines Matching refs:hwtimer_obj
331 static struct swm_hwtimer_device hwtimer_obj[sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0])] … variable
440 swm_timer_isr(&(hwtimer_obj[TIM0_INDEX].time_device)); in TIMR0_Handler()
449 swm_timer_isr(&(hwtimer_obj[TIM1_INDEX].time_device)); in TIMR1_Handler()
458 swm_timer_isr(&(hwtimer_obj[TIM2_INDEX].time_device)); in TIMR2_Handler()
467 swm_timer_isr(&(hwtimer_obj[TIM3_INDEX].time_device)); in TIMR3_Handler()
476 swm_timer_isr(&(hwtimer_obj[TIM4_INDEX].time_device)); in TIMR4_Handler()
485 swm_timer_isr(&(hwtimer_obj[BTIM0_INDEX].time_device)); in BTIMR0_Handler()
494 swm_timer_isr(&(hwtimer_obj[BTIM1_INDEX].time_device)); in BTIMR1_Handler()
503 swm_timer_isr(&(hwtimer_obj[BTIM2_INDEX].time_device)); in BTIMR2_Handler()
512 swm_timer_isr(&(hwtimer_obj[BTIM3_INDEX].time_device)); in BTIMR3_Handler()
521 swm_timer_isr(&(hwtimer_obj[BTIM4_INDEX].time_device)); in BTIMR4_Handler()
530 swm_timer_isr(&(hwtimer_obj[BTIM5_INDEX].time_device)); in BTIMR5_Handler()
539 swm_timer_isr(&(hwtimer_obj[BTIM6_INDEX].time_device)); in BTIMR6_Handler()
548 swm_timer_isr(&(hwtimer_obj[BTIM7_INDEX].time_device)); in BTIMR7_Handler()
557 swm_timer_isr(&(hwtimer_obj[BTIM8_INDEX].time_device)); in BTIMR8_Handler()
566 swm_timer_isr(&(hwtimer_obj[BTIM9_INDEX].time_device)); in BTIMR9_Handler()
575 swm_timer_isr(&(hwtimer_obj[BTIM10_INDEX].time_device)); in BTIMR10_Handler()
584 swm_timer_isr(&(hwtimer_obj[BTIM11_INDEX].time_device)); in BTIMR11_Handler()
596 hwtimer_obj[i].hwtimer_cfg = &swm_hwtimer_cfg[i]; in swm_timer_init()
597 hwtimer_obj[i].time_device.info = &_info; in swm_timer_init()
598 hwtimer_obj[i].time_device.ops = &swm_timer_ops; in swm_timer_init()
599 …result = rt_device_hwtimer_register(&hwtimer_obj[i].time_device, hwtimer_obj[i].hwtimer_cfg->name,… in swm_timer_init()
602 LOG_E("%s register fail.", hwtimer_obj[i].hwtimer_cfg->name); in swm_timer_init()
606 LOG_D("%s register success.", hwtimer_obj[i].hwtimer_cfg->name); in swm_timer_init()