Lines Matching refs:ui32Base
99 _ADCIntNumberGet(uint32_t ui32Base, uint32_t ui32SequenceNum) in _ADCIntNumberGet() argument
108 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
114 ui8Int = ((ui32Base == ADC0_BASE) ? in _ADCIntNumberGet()
148 ADCIntRegister(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCIntRegister() argument
156 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntRegister()
162 ui8Int = _ADCIntNumberGet(ui32Base, ui32SequenceNum); in ADCIntRegister()
194 ADCIntUnregister(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCIntUnregister() argument
201 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntUnregister()
207 ui8Int = _ADCIntNumberGet(ui32Base, ui32SequenceNum); in ADCIntUnregister()
234 ADCIntDisable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCIntDisable() argument
239 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisable()
245 HWREG(ui32Base + ADC_O_IM) &= ~(1 << ui32SequenceNum); in ADCIntDisable()
263 ADCIntEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCIntEnable() argument
268 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnable()
274 HWREG(ui32Base + ADC_O_ISC) = 1 << ui32SequenceNum; in ADCIntEnable()
279 HWREG(ui32Base + ADC_O_IM) |= 1 << ui32SequenceNum; in ADCIntEnable()
299 ADCIntStatus(uint32_t ui32Base, uint32_t ui32SequenceNum, bool bMasked) in ADCIntStatus() argument
306 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatus()
315 ui32Temp = HWREG(ui32Base + ADC_O_ISC) & (0x10001 << ui32SequenceNum); in ADCIntStatus()
319 ui32Temp = (HWREG(ui32Base + ADC_O_RIS) & in ADCIntStatus()
363 ADCIntClear(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCIntClear() argument
368 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntClear()
374 HWREG(ui32Base + ADC_O_ISC) = 1 << ui32SequenceNum; in ADCIntClear()
391 ADCSequenceEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceEnable() argument
396 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceEnable()
402 HWREG(ui32Base + ADC_O_ACTSS) |= 1 << ui32SequenceNum; in ADCSequenceEnable()
419 ADCSequenceDisable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceDisable() argument
424 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDisable()
430 HWREG(ui32Base + ADC_O_ACTSS) &= ~(1 << ui32SequenceNum); in ADCSequenceDisable()
502 ADCSequenceConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSequenceConfigure() argument
510 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceConfigure()
535 HWREG(ui32Base + ADC_O_EMUX) = ((HWREG(ui32Base + ADC_O_EMUX) & in ADCSequenceConfigure()
542 HWREG(ui32Base + ADC_O_SSPRI) = ((HWREG(ui32Base + ADC_O_SSPRI) & in ADCSequenceConfigure()
558 HWREG(ui32Base + ADC_O_TSSEL) = ((HWREG(ui32Base + ADC_O_TSSEL) & in ADCSequenceConfigure()
619 ADCSequenceStepConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSequenceStepConfigure() argument
627 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceStepConfigure()
637 ui32Base += ADC_SEQ + (ADC_SEQ_STEP * ui32SequenceNum); in ADCSequenceStepConfigure()
647 HWREG(ui32Base + ADC_SSMUX) = ((HWREG(ui32Base + ADC_SSMUX) & in ADCSequenceStepConfigure()
654 HWREG(ui32Base + ADC_SSEMUX) = ((HWREG(ui32Base + ADC_SSEMUX) & in ADCSequenceStepConfigure()
661 HWREG(ui32Base + ADC_SSCTL) = ((HWREG(ui32Base + ADC_SSCTL) & in ADCSequenceStepConfigure()
670 HWREG(ui32Base + ADC_SSTSH) = ((HWREG(ui32Base + ADC_SSTSH) & in ADCSequenceStepConfigure()
682 ui32Temp = HWREG(ui32Base + ADC_SSDC); in ADCSequenceStepConfigure()
685 HWREG(ui32Base + ADC_SSDC) = ui32Temp; in ADCSequenceStepConfigure()
690 HWREG(ui32Base + ADC_SSOP) |= (1 << ui32Step); in ADCSequenceStepConfigure()
698 HWREG(ui32Base + ADC_SSOP) &= ~(1 << ui32Step); in ADCSequenceStepConfigure()
718 ADCSequenceOverflow(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceOverflow() argument
723 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceOverflow()
729 return(HWREG(ui32Base + ADC_O_OSTAT) & (1 << ui32SequenceNum)); in ADCSequenceOverflow()
747 ADCSequenceOverflowClear(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceOverflowClear() argument
752 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceOverflowClear()
758 HWREG(ui32Base + ADC_O_OSTAT) = 1 << ui32SequenceNum; in ADCSequenceOverflowClear()
776 ADCSequenceUnderflow(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceUnderflow() argument
781 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceUnderflow()
787 return(HWREG(ui32Base + ADC_O_USTAT) & (1 << ui32SequenceNum)); in ADCSequenceUnderflow()
805 ADCSequenceUnderflowClear(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceUnderflowClear() argument
810 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceUnderflowClear()
816 HWREG(ui32Base + ADC_O_USTAT) = 1 << ui32SequenceNum; in ADCSequenceUnderflowClear()
838 ADCSequenceDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSequenceDataGet() argument
846 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDataGet()
852 ui32Base += ADC_SEQ + (ADC_SEQ_STEP * ui32SequenceNum); in ADCSequenceDataGet()
858 while(!(HWREG(ui32Base + ADC_SSFSTAT) & ADC_SSFSTAT0_EMPTY) && in ADCSequenceDataGet()
864 *pui32Buffer++ = HWREG(ui32Base + ADC_SSFIFO); in ADCSequenceDataGet()
898 ADCProcessorTrigger(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCProcessorTrigger() argument
903 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCProcessorTrigger()
909 HWREG(ui32Base + ADC_O_PSSI) |= ((ui32SequenceNum & 0xffff0000) | in ADCProcessorTrigger()
937 ADCSoftwareOversampleConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSoftwareOversampleConfigure() argument
946 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSoftwareOversampleConfigure()
962 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleConfigure()
995 ADCSoftwareOversampleStepConfigure(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSoftwareOversampleStepConfigure() argument
1003 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleStepConfigure()
1015 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSoftwareOversampleStepConfigure()
1026 ui32Base += ADC_SEQ + (ADC_SEQ_STEP * ui32SequenceNum); in ADCSoftwareOversampleStepConfigure()
1044 HWREG(ui32Base + ADC_SSMUX) = ((HWREG(ui32Base + ADC_SSMUX) & in ADCSoftwareOversampleStepConfigure()
1051 HWREG(ui32Base + ADC_SSEMUX) = ((HWREG(ui32Base + ADC_SSEMUX) & in ADCSoftwareOversampleStepConfigure()
1059 HWREG(ui32Base + ADC_SSCTL) = ((HWREG(ui32Base + ADC_SSCTL) & in ADCSoftwareOversampleStepConfigure()
1065 HWREG(ui32Base + ADC_SSCTL) &= ~((ADC_SSCTL0_IE0 | in ADCSoftwareOversampleStepConfigure()
1097 ADCSoftwareOversampleDataGet(uint32_t ui32Base, uint32_t ui32SequenceNum, in ADCSoftwareOversampleDataGet() argument
1106 if(ui32Base == ADC0_BASE) in ADCSoftwareOversampleDataGet()
1119 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSoftwareOversampleDataGet()
1130 ui32Base += ADC_SEQ + (ADC_SEQ_STEP * ui32SequenceNum); in ADCSoftwareOversampleDataGet()
1147 ui32Accum += HWREG(ui32Base + ADC_SSFIFO); in ADCSoftwareOversampleDataGet()
1185 ADCHardwareOversampleConfigure(uint32_t ui32Base, uint32_t ui32Factor) in ADCHardwareOversampleConfigure() argument
1192 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCHardwareOversampleConfigure()
1208 HWREG(ui32Base + ADC_O_SAC) = ui32Value; in ADCHardwareOversampleConfigure()
1283 ADCComparatorConfigure(uint32_t ui32Base, uint32_t ui32Comp, in ADCComparatorConfigure() argument
1289 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorConfigure()
1295 HWREG(ui32Base + ADC_O_DCCTL0 + (ui32Comp * 4)) = ui32Config; in ADCComparatorConfigure()
1319 ADCComparatorRegionSet(uint32_t ui32Base, uint32_t ui32Comp, in ADCComparatorRegionSet() argument
1325 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorRegionSet()
1333 HWREG(ui32Base + ADC_O_DCCMP0 + (ui32Comp * 4)) = ((ui32HighRef << 16) | in ADCComparatorRegionSet()
1354 ADCComparatorReset(uint32_t ui32Base, uint32_t ui32Comp, bool bTrigger, in ADCComparatorReset() argument
1362 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorReset()
1379 HWREG(ui32Base + ADC_O_DCRIC) = ui32Temp; in ADCComparatorReset()
1395 ADCComparatorIntDisable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCComparatorIntDisable() argument
1400 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorIntDisable()
1406 HWREG(ui32Base + ADC_O_IM) &= ~(0x10000 << ui32SequenceNum); in ADCComparatorIntDisable()
1422 ADCComparatorIntEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCComparatorIntEnable() argument
1427 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorIntEnable()
1433 HWREG(ui32Base + ADC_O_IM) |= 0x10000 << ui32SequenceNum; in ADCComparatorIntEnable()
1449 ADCComparatorIntStatus(uint32_t ui32Base) in ADCComparatorIntStatus() argument
1454 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorIntStatus()
1459 return(HWREG(ui32Base + ADC_O_DCISC)); in ADCComparatorIntStatus()
1475 ADCComparatorIntClear(uint32_t ui32Base, uint32_t ui32Status) in ADCComparatorIntClear() argument
1480 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCComparatorIntClear()
1485 HWREG(ui32Base + ADC_O_DCISC) = ui32Status; in ADCComparatorIntClear()
1522 ADCIntDisableEx(uint32_t ui32Base, uint32_t ui32IntFlags) in ADCIntDisableEx() argument
1527 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntDisableEx()
1532 HWREG(ui32Base + ADC_O_IM) &= ~ui32IntFlags; in ADCIntDisableEx()
1569 ADCIntEnableEx(uint32_t ui32Base, uint32_t ui32IntFlags) in ADCIntEnableEx() argument
1574 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntEnableEx()
1579 HWREG(ui32Base + ADC_O_IM) |= ui32IntFlags; in ADCIntEnableEx()
1599 ADCIntStatusEx(uint32_t ui32Base, bool bMasked) in ADCIntStatusEx() argument
1606 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCIntStatusEx()
1614 ui32Temp = HWREG(ui32Base + ADC_O_ISC); in ADCIntStatusEx()
1622 ui32Temp = HWREG(ui32Base + ADC_O_RIS); in ADCIntStatusEx()
1667 ADCIntClearEx(uint32_t ui32Base, uint32_t ui32IntFlags) in ADCIntClearEx() argument
1674 HWREG(ui32Base + ADC_O_ISC) = ui32IntFlags; in ADCIntClearEx()
1698 ADCReferenceSet(uint32_t ui32Base, uint32_t ui32Ref) in ADCReferenceSet() argument
1703 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCReferenceSet()
1709 HWREG(ui32Base + ADC_O_CTL) = in ADCReferenceSet()
1710 (HWREG(ui32Base + ADC_O_CTL) & ~ADC_CTL_VREF_M) | ui32Ref; in ADCReferenceSet()
1730 ADCReferenceGet(uint32_t ui32Base) in ADCReferenceGet() argument
1735 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCReferenceGet()
1740 return(HWREG(ui32Base + ADC_O_CTL) & ADC_CTL_VREF_M); in ADCReferenceGet()
1770 ADCPhaseDelaySet(uint32_t ui32Base, uint32_t ui32Phase) in ADCPhaseDelaySet() argument
1775 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCPhaseDelaySet()
1788 HWREG(ui32Base + ADC_O_SPC) = ui32Phase; in ADCPhaseDelaySet()
1808 ADCPhaseDelayGet(uint32_t ui32Base) in ADCPhaseDelayGet() argument
1813 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCPhaseDelayGet()
1818 return(HWREG(ui32Base + ADC_O_SPC)); in ADCPhaseDelayGet()
1835 ADCSequenceDMAEnable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceDMAEnable() argument
1840 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDMAEnable()
1846 HWREG(ui32Base + ADC_O_ACTSS) |= 0x100 << ui32SequenceNum; in ADCSequenceDMAEnable()
1862 ADCSequenceDMADisable(uint32_t ui32Base, uint32_t ui32SequenceNum) in ADCSequenceDMADisable() argument
1867 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCSequenceDMADisable()
1873 HWREG(ui32Base + ADC_O_ACTSS) &= ~(0x100 << ui32SequenceNum); in ADCSequenceDMADisable()
1897 ADCBusy(uint32_t ui32Base) in ADCBusy() argument
1902 ASSERT((ui32Base == ADC0_BASE) || (ui32Base == ADC1_BASE)); in ADCBusy()
1907 return((HWREG(ui32Base + ADC_O_ACTSS) & ADC_ACTSS_BUSY) ? true : false); in ADCBusy()
1979 ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config, in ADCClockConfigSet() argument
1985 ASSERT(ui32Base == ADC0_BASE); in ADCClockConfigSet()
1996 HWREG(ui32Base + ADC_O_PC) = (ui32Config >> 4) & ADC_PC_SR_M; in ADCClockConfigSet()
2001 HWREG(ui32Base + ADC_O_CC) = (ui32Config & ADC_CC_CS_M) | in ADCClockConfigSet()
2037 ADCClockConfigGet(uint32_t ui32Base, uint32_t *pui32ClockDiv) in ADCClockConfigGet() argument
2044 ASSERT(ui32Base == ADC0_BASE); in ADCClockConfigGet()