Lines Matching refs:ui32Config
620 uint32_t ui32Step, uint32_t ui32Config) in ADCSequenceStepConfigure() argument
649 ((ui32Config & 0x0f) << ui32Step)); in ADCSequenceStepConfigure()
656 (((ui32Config & 0xf00) >> 8) << ui32Step)); in ADCSequenceStepConfigure()
663 (((ui32Config & 0xf0) >> 4) << ui32Step)); in ADCSequenceStepConfigure()
672 (((ui32Config & 0xf00000) >> 20) << ui32Step)); in ADCSequenceStepConfigure()
677 if(ui32Config & 0x000F0000) in ADCSequenceStepConfigure()
684 ui32Temp |= (((ui32Config & 0x00070000) >> 16) << ui32Step); in ADCSequenceStepConfigure()
996 uint32_t ui32Step, uint32_t ui32Config) in ADCSoftwareOversampleStepConfigure() argument
1046 ((ui32Config & 0x0f) << ui32Step)); in ADCSoftwareOversampleStepConfigure()
1053 (((ui32Config & 0xf00) >> 8) << in ADCSoftwareOversampleStepConfigure()
1061 (((ui32Config & 0xf0) >> 4) << in ADCSoftwareOversampleStepConfigure()
1284 uint32_t ui32Config) in ADCComparatorConfigure() argument
1295 HWREG(ui32Base + ADC_O_DCCTL0 + (ui32Comp * 4)) = ui32Config; in ADCComparatorConfigure()
1979 ADCClockConfigSet(uint32_t ui32Base, uint32_t ui32Config, in ADCClockConfigSet() argument
1991 ASSERT((ui32Config & ADC_CLOCK_RATE_FULL) != 0); in ADCClockConfigSet()
1996 HWREG(ui32Base + ADC_O_PC) = (ui32Config >> 4) & ADC_PC_SR_M; in ADCClockConfigSet()
2001 HWREG(ui32Base + ADC_O_CC) = (ui32Config & ADC_CC_CS_M) | in ADCClockConfigSet()
2039 uint32_t ui32Config; in ADCClockConfigGet() local
2049 ui32Config = HWREG(ADC0_BASE + ADC_O_CC); in ADCClockConfigGet()
2057 ((ui32Config & ADC_CC_CLKDIV_M) >> ADC_CC_CLKDIV_S) + 1; in ADCClockConfigGet()
2063 ui32Config &= ~ADC_CC_CLKDIV_M; in ADCClockConfigGet()
2068 ui32Config |= (HWREG(ADC0_BASE + ADC_O_PC) & ADC_PC_SR_M) << 4; in ADCClockConfigGet()
2070 return(ui32Config); in ADCClockConfigGet()