Lines Matching refs:ui32CS
339 EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS, in EPIDividerCSSet() argument
348 ASSERT(ui32CS < 4); in EPIDividerCSSet()
353 if(ui32CS < 2) in EPIDividerCSSet()
355 ui32Reg = HWREG(ui32Base + EPI_O_BAUD) & ~(0xffff << (16 * ui32CS)); in EPIDividerCSSet()
356 ui32Reg |= ((ui32Divider & 0xffff) << (16 * ui32CS)); in EPIDividerCSSet()
362 ~(0xffff << (16 * (ui32CS - 2)))); in EPIDividerCSSet()
363 ui32Reg |= ((ui32Divider & 0xffff) << (16 * (ui32CS - 2))); in EPIDividerCSSet()
790 EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config) in EPIConfigHB8CSSet() argument
798 ASSERT(ui32CS < 4); in EPIConfigHB8CSSet()
803 if(ui32CS < 2) in EPIConfigHB8CSSet()
805 ui32Offset = EPI_O_HB8CFG + (ui32CS << 2); in EPIConfigHB8CSSet()
809 ui32Offset = EPI_O_HB8CFG3 + ((ui32CS - 2) << 2); in EPIConfigHB8CSSet()
877 EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config) in EPIConfigHB16CSSet() argument
885 ASSERT(ui32CS < 4); in EPIConfigHB16CSSet()
890 if(ui32CS < 2) in EPIConfigHB16CSSet()
892 ui32Offset = EPI_O_HB16CFG + (ui32CS << 2); in EPIConfigHB16CSSet()
896 ui32Offset = EPI_O_HB16CFG3 + ((ui32CS - 2) << 2); in EPIConfigHB16CSSet()
958 EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config) in EPIConfigHB8TimingSet() argument
964 ASSERT(ui32CS < 4); in EPIConfigHB8TimingSet()
969 HWREG(ui32Base + (EPI_O_HB8TIME + (ui32CS << 2))) = ui32Config; in EPIConfigHB8TimingSet()
1033 EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32Config) in EPIConfigHB16TimingSet() argument
1039 ASSERT(ui32CS < 4); in EPIConfigHB16TimingSet()
1044 HWREG(ui32Base + (EPI_O_HB16TIME + (ui32CS << 2))) = ui32Config; in EPIConfigHB16TimingSet()
1072 EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS, uint32_t ui32CR) in EPIPSRAMConfigRegSet() argument
1080 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegSet()
1085 if(ui32CS < 2) in EPIPSRAMConfigRegSet()
1087 ui32Offset = EPI_O_HB16CFG + (ui32CS << 2); in EPIPSRAMConfigRegSet()
1091 ui32Offset = EPI_O_HB16CFG3 + ((ui32CS - 2) << 2); in EPIPSRAMConfigRegSet()
1131 EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS) in EPIPSRAMConfigRegRead() argument
1139 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegRead()
1144 if(ui32CS < 2) in EPIPSRAMConfigRegRead()
1146 ui32Offset = EPI_O_HB16CFG + (ui32CS << 2); in EPIPSRAMConfigRegRead()
1150 ui32Offset = EPI_O_HB16CFG3 + ((ui32CS - 2) << 2); in EPIPSRAMConfigRegRead()
1188 EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base, uint32_t ui32CS, in EPIPSRAMConfigRegGetNonBlocking() argument
1197 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegGetNonBlocking()
1202 if(ui32CS < 2) in EPIPSRAMConfigRegGetNonBlocking()
1204 ui32Offset = EPI_O_HB16CFG + (ui32CS << 2); in EPIPSRAMConfigRegGetNonBlocking()
1208 ui32Offset = EPI_O_HB16CFG3 + ((ui32CS - 2) << 2); in EPIPSRAMConfigRegGetNonBlocking()
1258 EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS) in EPIPSRAMConfigRegGet() argument
1266 ASSERT(ui32CS < 4); in EPIPSRAMConfigRegGet()
1271 if(ui32CS < 2) in EPIPSRAMConfigRegGet()
1273 ui32Offset = EPI_O_HB16CFG + (ui32CS << 2); in EPIPSRAMConfigRegGet()
1277 ui32Offset = EPI_O_HB16CFG3 + ((ui32CS - 2) << 2); in EPIPSRAMConfigRegGet()