Lines Matching refs:ui32Base
114 _UARTBaseValid(uint32_t ui32Base) in _UARTBaseValid() argument
116 return((ui32Base == UART0_BASE) || (ui32Base == UART1_BASE) || in _UARTBaseValid()
117 (ui32Base == UART2_BASE) || (ui32Base == UART3_BASE) || in _UARTBaseValid()
118 (ui32Base == UART4_BASE) || (ui32Base == UART5_BASE) || in _UARTBaseValid()
119 (ui32Base == UART6_BASE) || (ui32Base == UART7_BASE)); in _UARTBaseValid()
137 _UARTIntNumberGet(uint32_t ui32Base) in _UARTIntNumberGet() argument
163 if(ppui32UARTIntMap[ui8Idx][0] == ui32Base) in _UARTIntNumberGet()
196 UARTParityModeSet(uint32_t ui32Base, uint32_t ui32Parity) in UARTParityModeSet() argument
201 ASSERT(_UARTBaseValid(ui32Base)); in UARTParityModeSet()
211 HWREG(ui32Base + UART_O_LCRH) = ((HWREG(ui32Base + UART_O_LCRH) & in UARTParityModeSet()
231 UARTParityModeGet(uint32_t ui32Base) in UARTParityModeGet() argument
236 ASSERT(_UARTBaseValid(ui32Base)); in UARTParityModeGet()
241 return(HWREG(ui32Base + UART_O_LCRH) & in UARTParityModeGet()
264 UARTFIFOLevelSet(uint32_t ui32Base, uint32_t ui32TxLevel, in UARTFIFOLevelSet() argument
270 ASSERT(_UARTBaseValid(ui32Base)); in UARTFIFOLevelSet()
285 HWREG(ui32Base + UART_O_IFLS) = ui32TxLevel | ui32RxLevel; in UARTFIFOLevelSet()
307 UARTFIFOLevelGet(uint32_t ui32Base, uint32_t *pui32TxLevel, in UARTFIFOLevelGet() argument
315 ASSERT(_UARTBaseValid(ui32Base)); in UARTFIFOLevelGet()
320 ui32Temp = HWREG(ui32Base + UART_O_IFLS); in UARTFIFOLevelGet()
373 UARTConfigSetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, in UARTConfigSetExpClk() argument
381 ASSERT(_UARTBaseValid(ui32Base)); in UARTConfigSetExpClk()
388 UARTDisable(ui32Base); in UARTConfigSetExpClk()
399 HWREG(ui32Base + UART_O_CTL) |= UART_CTL_HSE; in UARTConfigSetExpClk()
412 HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_HSE); in UARTConfigSetExpClk()
423 HWREG(ui32Base + UART_O_IBRD) = ui32Div / 64; in UARTConfigSetExpClk()
424 HWREG(ui32Base + UART_O_FBRD) = ui32Div % 64; in UARTConfigSetExpClk()
429 HWREG(ui32Base + UART_O_LCRH) = ui32Config; in UARTConfigSetExpClk()
434 HWREG(ui32Base + UART_O_FR) = 0; in UARTConfigSetExpClk()
439 UARTEnable(ui32Base); in UARTConfigSetExpClk()
474 UARTConfigGetExpClk(uint32_t ui32Base, uint32_t ui32UARTClk, in UARTConfigGetExpClk() argument
482 ASSERT(_UARTBaseValid(ui32Base)); in UARTConfigGetExpClk()
487 ui32Int = HWREG(ui32Base + UART_O_IBRD); in UARTConfigGetExpClk()
488 ui32Frac = HWREG(ui32Base + UART_O_FBRD); in UARTConfigGetExpClk()
494 if(HWREG(ui32Base + UART_O_CTL) & UART_CTL_HSE) in UARTConfigGetExpClk()
506 *pui32Config = (HWREG(ui32Base + UART_O_LCRH) & in UARTConfigGetExpClk()
523 UARTEnable(uint32_t ui32Base) in UARTEnable() argument
528 ASSERT(_UARTBaseValid(ui32Base)); in UARTEnable()
533 HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN; in UARTEnable()
538 HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_UARTEN | UART_CTL_TXE | in UARTEnable()
555 UARTDisable(uint32_t ui32Base) in UARTDisable() argument
560 ASSERT(_UARTBaseValid(ui32Base)); in UARTDisable()
565 while(HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) in UARTDisable()
572 HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN); in UARTDisable()
577 HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_UARTEN | UART_CTL_TXE | in UARTDisable()
593 UARTFIFOEnable(uint32_t ui32Base) in UARTFIFOEnable() argument
598 ASSERT(_UARTBaseValid(ui32Base)); in UARTFIFOEnable()
603 HWREG(ui32Base + UART_O_LCRH) |= UART_LCRH_FEN; in UARTFIFOEnable()
618 UARTFIFODisable(uint32_t ui32Base) in UARTFIFODisable() argument
623 ASSERT(_UARTBaseValid(ui32Base)); in UARTFIFODisable()
628 HWREG(ui32Base + UART_O_LCRH) &= ~(UART_LCRH_FEN); in UARTFIFODisable()
654 UARTEnableSIR(uint32_t ui32Base, bool bLowPower) in UARTEnableSIR() argument
659 ASSERT(_UARTBaseValid(ui32Base)); in UARTEnableSIR()
666 HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_SIREN | UART_CTL_SIRLP); in UARTEnableSIR()
670 HWREG(ui32Base + UART_O_CTL) |= (UART_CTL_SIREN); in UARTEnableSIR()
695 UARTDisableSIR(uint32_t ui32Base) in UARTDisableSIR() argument
700 ASSERT(_UARTBaseValid(ui32Base)); in UARTDisableSIR()
705 HWREG(ui32Base + UART_O_CTL) &= ~(UART_CTL_SIREN | UART_CTL_SIRLP); in UARTDisableSIR()
726 UARTSmartCardEnable(uint32_t ui32Base) in UARTSmartCardEnable() argument
733 ASSERT(_UARTBaseValid(ui32Base)); in UARTSmartCardEnable()
740 ui32Val = HWREG(ui32Base + UART_O_LCRH); in UARTSmartCardEnable()
745 HWREG(ui32Base + UART_O_LCRH) = ui32Val; in UARTSmartCardEnable()
750 HWREG(ui32Base + UART_O_CTL) |= UART_CTL_SMART; in UARTSmartCardEnable()
770 UARTSmartCardDisable(uint32_t ui32Base) in UARTSmartCardDisable() argument
775 ASSERT(_UARTBaseValid(ui32Base)); in UARTSmartCardDisable()
780 HWREG(ui32Base + UART_O_CTL) &= ~UART_CTL_SMART; in UARTSmartCardDisable()
807 UARTModemControlSet(uint32_t ui32Base, uint32_t ui32Control) in UARTModemControlSet() argument
817 ASSERT(ui32Base == UART1_BASE); in UARTModemControlSet()
819 ASSERT((ui32Base == UART0_BASE) || in UARTModemControlSet()
820 (ui32Base == UART1_BASE) || in UARTModemControlSet()
821 (ui32Base == UART2_BASE) || in UARTModemControlSet()
822 (ui32Base == UART3_BASE) || in UARTModemControlSet()
823 (ui32Base == UART4_BASE)); in UARTModemControlSet()
830 ui32Temp = HWREG(ui32Base + UART_O_CTL); in UARTModemControlSet()
832 HWREG(ui32Base + UART_O_CTL) = ui32Temp; in UARTModemControlSet()
859 UARTModemControlClear(uint32_t ui32Base, uint32_t ui32Control) in UARTModemControlClear() argument
869 ASSERT(ui32Base == UART1_BASE); in UARTModemControlClear()
871 ASSERT((ui32Base == UART0_BASE) || in UARTModemControlClear()
872 (ui32Base == UART1_BASE) || in UARTModemControlClear()
873 (ui32Base == UART2_BASE) || in UARTModemControlClear()
874 (ui32Base == UART3_BASE) || in UARTModemControlClear()
875 (ui32Base == UART4_BASE)); in UARTModemControlClear()
882 ui32Temp = HWREG(ui32Base + UART_O_CTL); in UARTModemControlClear()
884 HWREG(ui32Base + UART_O_CTL) = ui32Temp; in UARTModemControlClear()
907 UARTModemControlGet(uint32_t ui32Base) in UARTModemControlGet() argument
915 ASSERT(ui32Base == UART1_BASE); in UARTModemControlGet()
917 ASSERT((ui32Base == UART0_BASE) || in UARTModemControlGet()
918 (ui32Base == UART1_BASE) || in UARTModemControlGet()
919 (ui32Base == UART2_BASE) || in UARTModemControlGet()
920 (ui32Base == UART3_BASE) || in UARTModemControlGet()
921 (ui32Base == UART4_BASE)); in UARTModemControlGet()
924 return(HWREG(ui32Base + UART_O_CTL) & (UART_OUTPUT_RTS | UART_OUTPUT_DTR)); in UARTModemControlGet()
947 UARTModemStatusGet(uint32_t ui32Base) in UARTModemStatusGet() argument
955 ASSERT(ui32Base == UART1_BASE); in UARTModemStatusGet()
957 ASSERT((ui32Base == UART0_BASE) || in UARTModemStatusGet()
958 (ui32Base == UART1_BASE) || in UARTModemStatusGet()
959 (ui32Base == UART2_BASE) || in UARTModemStatusGet()
960 (ui32Base == UART3_BASE) || in UARTModemStatusGet()
961 (ui32Base == UART4_BASE)); in UARTModemStatusGet()
964 return(HWREG(ui32Base + UART_O_FR) & (UART_INPUT_RI | UART_INPUT_DCD | in UARTModemStatusGet()
994 UARTFlowControlSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTFlowControlSet() argument
999 ASSERT(_UARTBaseValid(ui32Base)); in UARTFlowControlSet()
1005 HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) & in UARTFlowControlSet()
1030 UARTFlowControlGet(uint32_t ui32Base) in UARTFlowControlGet() argument
1035 ASSERT(_UARTBaseValid(ui32Base)); in UARTFlowControlGet()
1037 return(HWREG(ui32Base + UART_O_CTL) & (UART_FLOWCONTROL_TX | in UARTFlowControlGet()
1067 UARTTxIntModeSet(uint32_t ui32Base, uint32_t ui32Mode) in UARTTxIntModeSet() argument
1072 ASSERT(_UARTBaseValid(ui32Base)); in UARTTxIntModeSet()
1079 HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) & in UARTTxIntModeSet()
1106 UARTTxIntModeGet(uint32_t ui32Base) in UARTTxIntModeGet() argument
1111 ASSERT(_UARTBaseValid(ui32Base)); in UARTTxIntModeGet()
1116 return(HWREG(ui32Base + UART_O_CTL) & (UART_TXINT_MODE_EOT | in UARTTxIntModeGet()
1134 UARTCharsAvail(uint32_t ui32Base) in UARTCharsAvail() argument
1139 ASSERT(_UARTBaseValid(ui32Base)); in UARTCharsAvail()
1144 return((HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) ? false : true); in UARTCharsAvail()
1161 UARTSpaceAvail(uint32_t ui32Base) in UARTSpaceAvail() argument
1166 ASSERT(_UARTBaseValid(ui32Base)); in UARTSpaceAvail()
1171 return((HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) ? false : true); in UARTSpaceAvail()
1190 UARTCharGetNonBlocking(uint32_t ui32Base) in UARTCharGetNonBlocking() argument
1195 ASSERT(_UARTBaseValid(ui32Base)); in UARTCharGetNonBlocking()
1200 if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE)) in UARTCharGetNonBlocking()
1205 return(HWREG(ui32Base + UART_O_DR)); in UARTCharGetNonBlocking()
1231 UARTCharGet(uint32_t ui32Base) in UARTCharGet() argument
1236 ASSERT(_UARTBaseValid(ui32Base)); in UARTCharGet()
1241 while(HWREG(ui32Base + UART_O_FR) & UART_FR_RXFE) in UARTCharGet()
1248 return(HWREG(ui32Base + UART_O_DR)); in UARTCharGet()
1269 UARTCharPutNonBlocking(uint32_t ui32Base, unsigned char ucData) in UARTCharPutNonBlocking() argument
1274 ASSERT(_UARTBaseValid(ui32Base)); in UARTCharPutNonBlocking()
1279 if(!(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF)) in UARTCharPutNonBlocking()
1284 HWREG(ui32Base + UART_O_DR) = ucData; in UARTCharPutNonBlocking()
1315 UARTCharPut(uint32_t ui32Base, unsigned char ucData) in UARTCharPut() argument
1320 ASSERT(_UARTBaseValid(ui32Base)); in UARTCharPut()
1325 while(HWREG(ui32Base + UART_O_FR) & UART_FR_TXFF) in UARTCharPut()
1332 HWREG(ui32Base + UART_O_DR) = ucData; in UARTCharPut()
1351 UARTBreakCtl(uint32_t ui32Base, bool bBreakState) in UARTBreakCtl() argument
1356 ASSERT(_UARTBaseValid(ui32Base)); in UARTBreakCtl()
1361 HWREG(ui32Base + UART_O_LCRH) = in UARTBreakCtl()
1363 (HWREG(ui32Base + UART_O_LCRH) | UART_LCRH_BRK) : in UARTBreakCtl()
1364 (HWREG(ui32Base + UART_O_LCRH) & ~(UART_LCRH_BRK))); in UARTBreakCtl()
1383 UARTBusy(uint32_t ui32Base) in UARTBusy() argument
1388 ASSERT(_UARTBaseValid(ui32Base)); in UARTBusy()
1393 return((HWREG(ui32Base + UART_O_FR) & UART_FR_BUSY) ? true : false); in UARTBusy()
1416 UARTIntRegister(uint32_t ui32Base, void (*pfnHandler)(void)) in UARTIntRegister() argument
1423 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntRegister()
1428 ui32Int = _UARTIntNumberGet(ui32Base); in UARTIntRegister()
1461 UARTIntUnregister(uint32_t ui32Base) in UARTIntUnregister() argument
1468 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntUnregister()
1473 ui32Int = _UARTIntNumberGet(ui32Base); in UARTIntUnregister()
1518 UARTIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags) in UARTIntEnable() argument
1523 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntEnable()
1528 HWREG(ui32Base + UART_O_IM) |= ui32IntFlags; in UARTIntEnable()
1550 UARTIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags) in UARTIntDisable() argument
1555 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntDisable()
1560 HWREG(ui32Base + UART_O_IM) &= ~(ui32IntFlags); in UARTIntDisable()
1580 UARTIntStatus(uint32_t ui32Base, bool bMasked) in UARTIntStatus() argument
1585 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntStatus()
1593 return(HWREG(ui32Base + UART_O_MIS)); in UARTIntStatus()
1597 return(HWREG(ui32Base + UART_O_RIS)); in UARTIntStatus()
1628 UARTIntClear(uint32_t ui32Base, uint32_t ui32IntFlags) in UARTIntClear() argument
1633 ASSERT(_UARTBaseValid(ui32Base)); in UARTIntClear()
1638 HWREG(ui32Base + UART_O_ICR) = ui32IntFlags; in UARTIntClear()
1664 UARTDMAEnable(uint32_t ui32Base, uint32_t ui32DMAFlags) in UARTDMAEnable() argument
1669 ASSERT(_UARTBaseValid(ui32Base)); in UARTDMAEnable()
1674 HWREG(ui32Base + UART_O_DMACTL) |= ui32DMAFlags; in UARTDMAEnable()
1696 UARTDMADisable(uint32_t ui32Base, uint32_t ui32DMAFlags) in UARTDMADisable() argument
1701 ASSERT(_UARTBaseValid(ui32Base)); in UARTDMADisable()
1706 HWREG(ui32Base + UART_O_DMACTL) &= ~ui32DMAFlags; in UARTDMADisable()
1727 UARTRxErrorGet(uint32_t ui32Base) in UARTRxErrorGet() argument
1732 ASSERT(_UARTBaseValid(ui32Base)); in UARTRxErrorGet()
1737 return(HWREG(ui32Base + UART_O_RSR) & 0x0000000F); in UARTRxErrorGet()
1755 UARTRxErrorClear(uint32_t ui32Base) in UARTRxErrorClear() argument
1760 ASSERT(_UARTBaseValid(ui32Base)); in UARTRxErrorClear()
1766 HWREG(ui32Base + UART_O_ECR) = 0; in UARTRxErrorClear()
1792 UARTClockSourceSet(uint32_t ui32Base, uint32_t ui32Source) in UARTClockSourceSet() argument
1797 ASSERT(_UARTBaseValid(ui32Base)); in UARTClockSourceSet()
1804 HWREG(ui32Base + UART_O_CC) = ui32Source; in UARTClockSourceSet()
1825 UARTClockSourceGet(uint32_t ui32Base) in UARTClockSourceGet() argument
1830 ASSERT(_UARTBaseValid(ui32Base)); in UARTClockSourceGet()
1835 return(HWREG(ui32Base + UART_O_CC)); in UARTClockSourceGet()
1854 UART9BitEnable(uint32_t ui32Base) in UART9BitEnable() argument
1859 ASSERT(_UARTBaseValid(ui32Base)); in UART9BitEnable()
1864 HWREG(ui32Base + UART_O_9BITADDR) |= UART_9BITADDR_9BITEN; in UART9BitEnable()
1883 UART9BitDisable(uint32_t ui32Base) in UART9BitDisable() argument
1888 ASSERT(_UARTBaseValid(ui32Base)); in UART9BitDisable()
1893 HWREG(ui32Base + UART_O_9BITADDR) &= ~UART_9BITADDR_9BITEN; in UART9BitDisable()
1918 UART9BitAddrSet(uint32_t ui32Base, uint8_t ui8Addr, in UART9BitAddrSet() argument
1924 ASSERT(_UARTBaseValid(ui32Base)); in UART9BitAddrSet()
1929 HWREG(ui32Base + UART_O_9BITADDR) = ui8Addr << UART_9BITADDR_ADDR_S; in UART9BitAddrSet()
1930 HWREG(ui32Base + UART_O_9BITAMASK) = ui8Mask << UART_9BITAMASK_MASK_S; in UART9BitAddrSet()
1957 UART9BitAddrSend(uint32_t ui32Base, uint8_t ui8Addr) in UART9BitAddrSend() argument
1964 ASSERT(_UARTBaseValid(ui32Base)); in UART9BitAddrSend()
1969 while((HWREG(ui32Base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) != in UART9BitAddrSend()
1977 ui32LCRH = HWREG(ui32Base + UART_O_LCRH); in UART9BitAddrSend()
1978 HWREG(ui32Base + UART_O_LCRH) = ((ui32LCRH & ~UART_LCRH_EPS) | in UART9BitAddrSend()
1984 HWREG(ui32Base + UART_O_DR) = ui8Addr; in UART9BitAddrSend()
1989 while((HWREG(ui32Base + UART_O_FR) & (UART_FR_TXFE | UART_FR_BUSY)) != in UART9BitAddrSend()
1997 HWREG(ui32Base + UART_O_LCRH) = ui32LCRH; in UART9BitAddrSend()
2016 void UARTLoopbackEnable(uint32_t ui32Base) in UARTLoopbackEnable() argument
2021 ASSERT(_UARTBaseValid(ui32Base)); in UARTLoopbackEnable()
2026 HWREG(ui32Base + UART_O_CTL) |= UART_CTL_LBE; in UARTLoopbackEnable()