Lines Matching refs:ui32ChannelNum

152 uDMAChannelEnable(uint32_t ui32ChannelNum)  in uDMAChannelEnable()  argument
157 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelEnable()
162 HWREG(UDMA_ENASET) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelEnable()
179 uDMAChannelDisable(uint32_t ui32ChannelNum) in uDMAChannelDisable() argument
184 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelDisable()
189 HWREG(UDMA_ENACLR) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelDisable()
206 uDMAChannelIsEnabled(uint32_t ui32ChannelNum) in uDMAChannelIsEnabled() argument
211 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelIsEnabled()
217 return((HWREG(UDMA_ENASET) & (1 << (ui32ChannelNum & 0x1f))) ? true : in uDMAChannelIsEnabled()
320 uDMAChannelRequest(uint32_t ui32ChannelNum) in uDMAChannelRequest() argument
325 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelRequest()
330 HWREG(UDMA_SWREQ) = 1 << (ui32ChannelNum & 0x1f); in uDMAChannelRequest()
356 uDMAChannelAttributeEnable(uint32_t ui32ChannelNum, uint32_t ui32Attr) in uDMAChannelAttributeEnable() argument
361 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelAttributeEnable()
370 ui32ChannelNum &= 0x1f; in uDMAChannelAttributeEnable()
377 HWREG(UDMA_USEBURSTSET) = 1 << ui32ChannelNum; in uDMAChannelAttributeEnable()
386 HWREG(UDMA_ALTSET) = 1 << ui32ChannelNum; in uDMAChannelAttributeEnable()
394 HWREG(UDMA_PRIOSET) = 1 << ui32ChannelNum; in uDMAChannelAttributeEnable()
402 HWREG(UDMA_REQMASKSET) = 1 << ui32ChannelNum; in uDMAChannelAttributeEnable()
429 uDMAChannelAttributeDisable(uint32_t ui32ChannelNum, uint32_t ui32Attr) in uDMAChannelAttributeDisable() argument
434 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelAttributeDisable()
443 ui32ChannelNum &= 0x1f; in uDMAChannelAttributeDisable()
450 HWREG(UDMA_USEBURSTCLR) = 1 << ui32ChannelNum; in uDMAChannelAttributeDisable()
459 HWREG(UDMA_ALTCLR) = 1 << ui32ChannelNum; in uDMAChannelAttributeDisable()
467 HWREG(UDMA_PRIOCLR) = 1 << ui32ChannelNum; in uDMAChannelAttributeDisable()
475 HWREG(UDMA_REQMASKCLR) = 1 << ui32ChannelNum; in uDMAChannelAttributeDisable()
500 uDMAChannelAttributeGet(uint32_t ui32ChannelNum) in uDMAChannelAttributeGet() argument
507 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelAttributeGet()
514 ui32ChannelNum &= 0x1f; in uDMAChannelAttributeGet()
519 if(HWREG(UDMA_USEBURSTSET) & (1 << ui32ChannelNum)) in uDMAChannelAttributeGet()
527 if(HWREG(UDMA_ALTSET) & (1 << ui32ChannelNum)) in uDMAChannelAttributeGet()
535 if(HWREG(UDMA_PRIOSET) & (1 << ui32ChannelNum)) in uDMAChannelAttributeGet()
543 if(HWREG(UDMA_REQMASKSET) & (1 << ui32ChannelNum)) in uDMAChannelAttributeGet()
861 uDMAChannelScatterGatherSet(uint32_t ui32ChannelNum, uint32_t ui32TaskCount, in uDMAChannelScatterGatherSet() argument
870 ASSERT((ui32ChannelNum & 0xffff) < 32); in uDMAChannelScatterGatherSet()
881 ui32ChannelNum &= 0x1f; in uDMAChannelScatterGatherSet()
897 psControlTable[ui32ChannelNum].pvSrcEndAddr = in uDMAChannelScatterGatherSet()
904 psControlTable[ui32ChannelNum].pvDstEndAddr = in uDMAChannelScatterGatherSet()
905 &psControlTable[ui32ChannelNum | UDMA_ALT_SELECT].ui32Spare; in uDMAChannelScatterGatherSet()
913 psControlTable[ui32ChannelNum].ui32Control = in uDMAChannelScatterGatherSet()
928 HWREG(UDMA_ALTCLR) = 1 << ui32ChannelNum; in uDMAChannelScatterGatherSet()