Lines Matching refs:OUTB
77 OUTB(dmanr, DMA1_MASK_REG); in EnableDma()
79 OUTB(dmanr & 3, DMA2_MASK_REG); in EnableDma()
88 OUTB(dmanr | 4, DMA1_MASK_REG); in DisableDma()
90 OUTB((dmanr & 3) | 4, DMA2_MASK_REG); in DisableDma()
99 OUTB(0, DMA1_CLEAR_FF_REG); in ClearDmaFF()
101 OUTB(0, DMA2_CLEAR_FF_REG); in ClearDmaFF()
110 OUTB(mode | dmanr, DMA1_MODE_REG); in SetDmaMode()
112 OUTB(mode | (dmanr&3), DMA2_MODE_REG); in SetDmaMode()
122 OUTB(pagenr, DMA_PAGE_0); in SetDmaPage()
125 OUTB(pagenr, DMA_PAGE_1); in SetDmaPage()
128 OUTB(pagenr, DMA_PAGE_2); in SetDmaPage()
131 OUTB(pagenr, DMA_PAGE_3); in SetDmaPage()
134 OUTB(pagenr & 0xfe, DMA_PAGE_5); in SetDmaPage()
137 OUTB(pagenr & 0xfe, DMA_PAGE_6); in SetDmaPage()
140 OUTB(pagenr & 0xfe, DMA_PAGE_7); in SetDmaPage()
153 OUTB( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); in SetDmaAddr()
154 OUTB( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE ); in SetDmaAddr()
156 OUTB( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); in SetDmaAddr()
157 OUTB( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE ); in SetDmaAddr()
169 OUTB( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); in SetDmaCount()
170 OUTB( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE ); in SetDmaCount()
172 OUTB( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); in SetDmaCount()
173 OUTB( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE ); in SetDmaCount()