Lines Matching refs:base
62 void gic_common_sgi_config(void *base, void *data, int irq_base) in gic_common_sgi_config() argument
79 rt_err_t gic_common_configure_irq(void *base, int irq, rt_uint32_t mode, void (*sync_access)(void *… in gic_common_configure_irq() argument
90 val = oldval = HWREG32(base + confoff); in gic_common_configure_irq()
105 HWREG32(base + confoff) = val; in gic_common_configure_irq()
107 if (HWREG32(base + confoff) != val) in gic_common_configure_irq()
122 void gic_common_dist_config(void *base, int max_irqs, void (*sync_access)(void *), void *data) in gic_common_dist_config() argument
129 HWREG32(base + GIC_DIST_CONFIG + i / 4) = GICD_INT_ACTLOW_LVLTRIG; in gic_common_dist_config()
135 HWREG32(base + GIC_DIST_PRI + i * 4 / 4) = GICD_INT_DEF_PRI_X4; in gic_common_dist_config()
141 HWREG32(base + GIC_DIST_ACTIVE_CLEAR + i / 8) = GICD_INT_EN_CLR_X32; in gic_common_dist_config()
142 HWREG32(base + GIC_DIST_ENABLE_CLEAR + i / 8) = GICD_INT_EN_CLR_X32; in gic_common_dist_config()
151 void gic_common_cpu_config(void *base, int nr, void (*sync_access)(void *), void *data) in gic_common_cpu_config() argument
158 HWREG32(base + GIC_DIST_ACTIVE_CLEAR + i / 8) = GICD_INT_EN_CLR_X32; in gic_common_cpu_config()
159 HWREG32(base + GIC_DIST_ENABLE_CLEAR + i / 8) = GICD_INT_EN_CLR_X32; in gic_common_cpu_config()
165 HWREG32(base + GIC_DIST_PRI + i * 4 / 4) = GICD_INT_DEF_PRI_X4; in gic_common_cpu_config()