Lines Matching refs:vector
37 static void default_isr_handler(int vector, void *param) in default_isr_handler() argument
40 rt_kprintf("cpu %d unhandled irq: %d\n", rt_hw_cpu_id(),vector); in default_isr_handler()
42 rt_kprintf("unhandled irq: %d\n",vector); in default_isr_handler()
125 void rt_hw_interrupt_mask(int vector) in rt_hw_interrupt_mask() argument
128 if (vector < 32) in rt_hw_interrupt_mask()
130 IRQ_DISABLE1 = (1UL << vector); in rt_hw_interrupt_mask()
132 else if (vector < 64) in rt_hw_interrupt_mask()
134 vector = vector % 32; in rt_hw_interrupt_mask()
135 IRQ_DISABLE2 = (1UL << vector); in rt_hw_interrupt_mask()
139 vector = vector - 64; in rt_hw_interrupt_mask()
140 IRQ_DISABLE_BASIC = (1UL << vector); in rt_hw_interrupt_mask()
143 arm_gic_mask(0, vector); in rt_hw_interrupt_mask()
151 void rt_hw_interrupt_umask(int vector) in rt_hw_interrupt_umask() argument
154 if (vector < 32) in rt_hw_interrupt_umask()
156 IRQ_ENABLE1 = (1UL << vector); in rt_hw_interrupt_umask()
158 else if (vector < 64) in rt_hw_interrupt_umask()
160 vector = vector % 32; in rt_hw_interrupt_umask()
161 IRQ_ENABLE2 = (1UL << vector); in rt_hw_interrupt_umask()
165 vector = vector - 64; in rt_hw_interrupt_umask()
166 IRQ_ENABLE_BASIC = (1UL << vector); in rt_hw_interrupt_umask()
169 arm_gic_umask(0, vector); in rt_hw_interrupt_umask()
190 void rt_hw_interrupt_ack(int vector) in rt_hw_interrupt_ack() argument
193 arm_gic_ack(0, vector); in rt_hw_interrupt_ack()
203 void rt_hw_interrupt_set_target_cpus(int vector, unsigned long cpu_mask) in rt_hw_interrupt_set_target_cpus() argument
207 arm_gic_set_router_cpu(0, vector, cpu_mask); in rt_hw_interrupt_set_target_cpus()
209 arm_gic_set_cpu(0, vector, (unsigned int) cpu_mask); in rt_hw_interrupt_set_target_cpus()
219 unsigned int rt_hw_interrupt_get_target_cpus(int vector) in rt_hw_interrupt_get_target_cpus() argument
221 return arm_gic_get_target_cpu(0, vector); in rt_hw_interrupt_get_target_cpus()
229 void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode) in rt_hw_interrupt_set_triger_mode() argument
231 arm_gic_set_configuration(0, vector, mode & IRQ_MODE_MASK); in rt_hw_interrupt_set_triger_mode()
239 unsigned int rt_hw_interrupt_get_triger_mode(int vector) in rt_hw_interrupt_get_triger_mode() argument
241 return arm_gic_get_configuration(0, vector); in rt_hw_interrupt_get_triger_mode()
248 void rt_hw_interrupt_set_pending(int vector) in rt_hw_interrupt_set_pending() argument
250 arm_gic_set_pending_irq(0, vector); in rt_hw_interrupt_set_pending()
258 unsigned int rt_hw_interrupt_get_pending(int vector) in rt_hw_interrupt_get_pending() argument
260 return arm_gic_get_pending_irq(0, vector); in rt_hw_interrupt_get_pending()
267 void rt_hw_interrupt_clear_pending(int vector) in rt_hw_interrupt_clear_pending() argument
269 arm_gic_clear_pending_irq(0, vector); in rt_hw_interrupt_clear_pending()
277 void rt_hw_interrupt_set_priority(int vector, unsigned int priority) in rt_hw_interrupt_set_priority() argument
279 arm_gic_set_priority(0, vector, priority); in rt_hw_interrupt_set_priority()
287 unsigned int rt_hw_interrupt_get_priority(int vector) in rt_hw_interrupt_get_priority() argument
289 return arm_gic_get_priority(0, vector); in rt_hw_interrupt_get_priority()
354 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler, in rt_hw_interrupt_install() argument
359 if (vector < MAX_HANDLERS) in rt_hw_interrupt_install()
361 old_handler = isr_table[vector].handler; in rt_hw_interrupt_install()
366 rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX); in rt_hw_interrupt_install()
368 isr_table[vector].handler = handler; in rt_hw_interrupt_install()
369 isr_table[vector].param = param; in rt_hw_interrupt_install()
374 if (vector > 32) in rt_hw_interrupt_install()
379 rt_hw_interrupt_set_target_cpus(vector, cpu_affinity_val); in rt_hw_interrupt_install()
381 rt_hw_interrupt_set_target_cpus(vector, 1 << rt_hw_cpu_id()); in rt_hw_interrupt_install()