Lines Matching refs:dist_hw_base
24 rt_uint32_t dist_hw_base; /* the base address of the gic distributor */ member
83 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_ack()
96 GIC_DIST_ENABLE_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_mask()
108 GIC_DIST_ENABLE_SET(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_umask()
122 pend = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_pending_irq()
127 … pend = (GIC_DIST_SPENDSGI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_pending_irq()
151 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) = 1U << (irq % 32U); in arm_gic_set_pending_irq()
157 GIC_DIST_SOFTINT(_gic_table[index].dist_hw_base) = (irq | 0x02000000U); in arm_gic_set_pending_irq()
173 GIC_DIST_PENDING_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
178 GIC_DIST_CPENDSGI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_pending_irq()
192 icfgr = GIC_DIST_CONFIG(_gic_table[index].dist_hw_base, irq); in arm_gic_set_configuration()
198 GIC_DIST_CONFIG(_gic_table[index].dist_hw_base, irq) = icfgr; in arm_gic_set_configuration()
208 return (GIC_DIST_CONFIG(_gic_table[index].dist_hw_base, irq) >> ((irq % 16U) >> 1U)); in arm_gic_get_configuration()
220 GIC_DIST_ACTIVE_CLEAR(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_clear_active()
233 old_tgt = GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq); in arm_gic_set_cpu()
238 GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) = old_tgt; in arm_gic_set_cpu()
248 return (GIC_DIST_TARGET(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_target_cpu()
260 mask = GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq); in arm_gic_set_priority()
263 GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) = mask; in arm_gic_set_priority()
273 return (GIC_DIST_PRI(_gic_table[index].dist_hw_base, irq) >> ((irq % 4U) * 8U)) & 0xFFUL; in arm_gic_get_priority()
311 active = (GIC_DIST_ACTIVE_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
312 pending = (GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_irq_status()
324 …GIC_DIST_SOFTINT(_gic_table[index].dist_hw_base) = ((filter_list & 0x3U) << 24U) | ((target_list &… in arm_gic_send_sgi()
352 igroupr = GIC_DIST_IGROUP(_gic_table[index].dist_hw_base, irq); in arm_gic_set_group()
357 GIC_DIST_IGROUP(_gic_table[index].dist_hw_base, irq) = igroupr; in arm_gic_set_group()
367 return (GIC_DIST_IGROUP(_gic_table[index].dist_hw_base, irq) >> (irq % 32U)) & 0x1UL; in arm_gic_get_group()
377 _gic_table[index].dist_hw_base = dist_base; in arm_gic_dist_init()
452 gic_type = GIC_DIST_TYPE(_gic_table[index].dist_hw_base); in arm_gic_dump_type()
454 (GIC_DIST_ICPIDR2(_gic_table[index].dist_hw_base) >> 4U) & 0xfUL, in arm_gic_dump_type()
455 _gic_table[index].dist_hw_base, in arm_gic_dump_type()
471 GIC_DIST_ENABLE_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
478 GIC_DIST_PENDING_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()
485 GIC_DIST_ACTIVE_SET(_gic_table[index].dist_hw_base, in arm_gic_dump()