Lines Matching refs:r1
73 STR r1, [r2]
76 LDR r1, =NVIC_PENDSVSET
77 STR r1, [r0]
81 ; r1 --> switch to thread stack
82 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
92 LDR r1, [r0]
93 CMP r1, #0x00
97 MOVS r1, #0x00
98 STR r1, [r0]
101 LDR r1, [r0]
102 CMP r1, #0x00
105 MRS r1, psp ; get from thread stack pointer
107 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
109 STR r1, [r0] ; update from thread stack pointer
111 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
117 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
120 LDR r1, =rt_interrupt_to_thread
121 LDR r1, [r1]
122 LDR r1, [r1] ; load thread stack pointer
124 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
127 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
135 MSR psp, r1 ; update stack pointer
153 LDR r1, =rt_interrupt_to_thread
154 STR r0, [r1]
157 LDR r1, =rt_interrupt_from_thread
159 STR r0, [r1]
162 LDR r1, =rt_thread_switch_interrupt_flag
164 STR r0, [r1]
168 LDR r1, =NVIC_PENDSV_PRI
170 ORRS r1,r1,r2 ; modify
171 STR r1, [r0] ; write-back
175 LDR r1, =NVIC_PENDSVSET
176 STR r1, [r0]