Lines Matching refs:r1
76 STR r1, [r2]
79 LDR r1, =NVIC_PENDSVSET
80 STR r1, [r0]
85 ; r1 --> switch to thread stack
86 ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
96 LDR r1, [r0]
97 CMP r1, #0x00
101 MOVS r1, #0x00
102 STR r1, [r0]
105 LDR r1, [r0]
106 CMP r1, #0x00
109 MRS r1, psp ; get from thread stack pointer
111 SUBS r1, r1, #0x20 ; space for {r4 - r7} and {r8 - r11}
113 STR r1, [r0] ; update from thread stack pointer
115 STMIA r1!, {r4 - r7} ; push thread {r4 - r7} register to thread stack
121 STMIA r1!, {r4 - r7} ; push thread {r8 - r11} high register to thread stack
124 LDR r1, =rt_interrupt_to_thread
125 LDR r1, [r1]
126 LDR r1, [r1] ; load thread stack pointer
128 LDMIA r1!, {r4 - r7} ; pop thread {r4 - r7} register from thread stack
131 …LDMIA r1!, {r4 - r7} ; pop thread {r8 - r11} high register from thread stack to {r4 - r…
139 MSR psp, r1 ; update stack pointer
158 LDR r1, =rt_interrupt_to_thread
159 STR r0, [r1]
162 LDR r1, =rt_interrupt_from_thread
164 STR r0, [r1]
167 LDR r1, =rt_thread_switch_interrupt_flag
169 STR r0, [r1]
173 LDR r1, =NVIC_PENDSV_PRI
175 ORRS r1,r1,r2 ; modify
176 STR r1, [r0] ; write-back
180 LDR r1, =NVIC_PENDSVSET
181 STR r1, [r0]