Lines Matching refs:R1
72 STR R1, [R2]
75 LDR R1, =NVIC_PENDSVSET
76 STR R1, [R0]
92 LDR R1, [R0]
93 CMP R1, #0x00
97 MOVS R1, #0
98 STR R1, [R0]
101 LDR R1, [R0]
102 CMP R1, #0x00
105 MRS R1, PSP /* get from thread stack pointer */
107 SUBS R1, R1, #0x20 /* space for {R4 - R7} and {R8 - R11} */
109 STR R1, [R0] /* update from thread stack pointer */
111 STMIA R1!, {R4 - R7} /* push thread {R4 - R7} register to thread stack */
117 STMIA R1!, {R4 - R7} /* push thread {R8 - R11} high register to thread stack */
119 LDR R1, =rt_interrupt_to_thread
120 LDR R1, [R1]
121 LDR R1, [R1] /* load thread stack pointer */
123 LDMIA R1!, {R4 - R7} /* pop thread {R4 - R7} register from thread stack */
126 …LDMIA R1!, {R4 - R7} /* pop thread {R8 - R11} high register from thread stack to {R4 - …
134 MSR PSP, R1 /* update stack pointer */
150 LDR R1, =rt_interrupt_to_thread
151 STR R0, [R1]
154 LDR R1, =rt_interrupt_from_thread
156 STR R0, [R1]
159 LDR R1, =rt_thread_switch_interrupt_flag
161 STR R0, [R1]
165 LDR R1, =NVIC_PENDSV_PRI
167 ORRS R1, R1, R2 /* modify */
168 STR R1, [R0] /* write-back */
171 LDR R1, =NVIC_PENDSVSET
172 STR R1, [R0]