Lines Matching refs:r0
39 MRS r0, PRIMASK
50 MSR PRIMASK, r0
74 STR r0, [r2]
80 LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
82 STR r1, [r0]
97 LDR r0, =rt_thread_switch_interrupt_flag
98 LDR r1, [r0]
103 STR r1, [r0]
105 LDR r0, =rt_interrupt_from_thread
106 LDR r1, [r0]
129 LDR r0, [r0]
130 STR r1, [r0] /* update from thread stack pointer */
173 STR r0, [r1]
184 MOV r0, #0x0
185 STR r0, [r1]
189 MOV r0, #1
190 STR r0, [r1]
193 LDR r0, =NVIC_SYSPRI2
195 LDR.W r2, [r0,#0x00] /* read */
197 STR r1, [r0] /* write-back */
199 LDR r0, =NVIC_INT_CTRL /* trigger the PendSV exception (causes context switch) */
201 STR r1, [r0]
204 LDR r0, =SCB_VTOR
205 LDR r0, [r0]
206 LDR r0, [r0]
208 MSR msp, r0
215 MOV r0, #0x00
216 MSR BASEPRI, r0
235 MRS r0, msp /* get fault context from handler. */
238 MRS r0, psp /* get fault context from thread. */
244 VSTMDBEQ r0!, {d8 - d15} /* push FPU register s16~s31 */
247 STMFD r0!, {r4 - r11} /* push r4 - r11 register */
255 STMFD r0!, {r4} /* push flag */
258 STMFD r0!, {lr} /* push exec_return register */
262 MSR psp, r0 /* update stack pointer to PSP. */
265 MSR msp, r0 /* update stack pointer to MSP. */