Lines Matching refs:r1
78 STR r1, [r2]
81 LDR r1, =NVIC_PENDSVSET
82 STR r1, [r0]
98 LDR r1, [r0]
99 CBZ r1, pendsv_exit /* pendsv already handled */
102 MOV r1, #0x00
103 STR r1, [r0]
106 LDR r1, [r0]
107 CBZ r1, switch_to_thread /* skip register save at the first time */
109 MRS r1, psp /* get from thread stack pointer */
114 VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
117 STMFD r1!, {r4 - r11} /* push r4 - r11 register */
126 STMFD r1!, {r4} /* push flag */
130 STR r1, [r0] /* update from thread stack pointer */
133 LDR r1, =rt_interrupt_to_thread
134 LDR r1, [r1]
135 LDR r1, [r1] /* load thread stack pointer */
138 LDMFD r1!, {r3} /* pop flag */
141 LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
146 VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
149 MSR psp, r1 /* update stack pointer */
172 LDR r1, =rt_interrupt_to_thread
173 STR r0, [r1]
183 LDR r1, =rt_interrupt_from_thread
185 STR r0, [r1]
188 LDR r1, =rt_thread_switch_interrupt_flag
190 STR r0, [r1]
194 LDR r1, =NVIC_PENDSV_PRI
196 ORR r1,r1,r2 /* modify */
197 STR r1, [r0] /* write-back */
200 LDR r1, =NVIC_PENDSVSET
201 STR r1, [r0]