Lines Matching refs:r1
77 STR r1, [r2]
80 LDR r1, =NVIC_PENDSVSET
81 STR r1, [r0]
97 LDR r1, [r0]
98 CBZ r1, pendsv_exit /* pendsv already handled */
101 MOV r1, #0x00
102 STR r1, [r0]
105 LDR r1, [r0]
106 CBZ r1, switch_to_thread /* skip register save at the first time */
108 MRS r1, psp /* get from thread stack pointer */
113 VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
116 STMFD r1!, {r4 - r11} /* push r4 - r11 register */
125 STMFD r1!, {r4} /* push flag */
129 STR r1, [r0] /* update from thread stack pointer */
132 LDR r1, =rt_interrupt_to_thread
133 LDR r1, [r1]
134 LDR r1, [r1] /* load thread stack pointer */
137 LDMFD r1!, {r3} /* pop flag */
140 LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
145 VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
148 MSR psp, r1 /* update stack pointer */
178 LDR r1, =rt_interrupt_to_thread
179 STR r0, [r1]
189 LDR r1, =rt_interrupt_from_thread
191 STR r0, [r1]
194 LDR r1, =rt_thread_switch_interrupt_flag
196 STR r0, [r1]
200 LDR r1, =NVIC_PENDSV_PRI
202 ORR r1,r1,r2 /* modify */
203 STR r1, [r0] /* write-back */
206 LDR r1, =NVIC_PENDSVSET
207 STR r1, [r0]