Lines Matching refs:r1
75 STR r1, [r2]
78 LDR r1, =NVIC_PENDSVSET
79 STR r1, [r0]
95 LDR r1, [r0]
96 CBZ r1, pendsv_exit /* pendsv already handled */
99 MOV r1, #0x00
100 STR r1, [r0]
103 LDR r1, [r0]
104 CBZ r1, switch_to_thread /* skip register save at the first time */
106 MRS r1, psp /* get from thread stack pointer */
111 VSTMDBEQ r1!, {d8 - d15} /* push FPU register s16~s31 */
114 STMFD r1!, {r4 - r11} /* push r4 - r11 register */
123 STMFD r1!, {r4} /* push flag */
127 STR r1, [r0] /* update from thread stack pointer */
135 LDR r1, =rt_interrupt_to_thread
136 LDR r1, [r1]
137 LDR r1, [r1] /* load thread stack pointer */
140 LDMFD r1!, {r3} /* pop flag */
143 LDMFD r1!, {r4 - r11} /* pop r4 - r11 register */
148 VLDMIANE r1!, {d8 - d15} /* pop FPU register s16~s31 */
151 MSR psp, r1 /* update stack pointer */
174 LDR r1, =rt_interrupt_to_thread
175 STR r0, [r1]
185 LDR r1, =rt_interrupt_from_thread
187 STR r0, [r1]
190 LDR r1, =rt_thread_switch_interrupt_flag
192 STR r0, [r1]
196 LDR r1, =NVIC_PENDSV_PRI
198 ORR r1,r1,r2 /* modify */
199 STR r1, [r0] /* write-back */
202 LDR r1, =NVIC_PENDSVSET
203 STR r1, [r0]