Lines Matching refs:ldr
89 ldr r0, =stack_top
125 ldr lr, =_c_int00
131 ldr r1, =_sidata /* .data start in image */
132 ldr r2, =_edata /* .data end in image */
133 ldr r3, =_sdata /* sram data start */
135 ldr r0, [r1, #0]
146 ldr r1,=__bss_start /* bss start */
147 ldr r2,=__bss_end /* bss end */
155 ldr r0, =__ctors_start__
156 ldr r1, =__ctors_end__
161 ldr r2, [r0], #4
380 ldr r0, ESMSR1_REG @ load the ESMSR1 status register address
381 ldr r2, ESMSR1_ERR_CLR
384 ldr r0, ESMSR2_REG @ load the ESMSR2 status register address
385 ldr r2, ESMSR2_ERR_CLR
388 ldr r0, ESMSSR2_REG @ load the ESMSSR2 status register address
389 ldr r2, ESMSSR2_ERR_CLR
392 ldr r0, ESMKEY_REG @ load the ESMKEY register address
396 ldr r0, VIM_INTREQ @ load the INTREQ register address
397 ldr r2, VIM_INT_CLR
399 ldr r0, CCMR4_STAT_REG @ load the CCMR4 status register address
400 ldr r2, CCMR4_ERR_CLR