Lines Matching refs:ldr
87 ldr r0, =stack_top
123 ldr lr, =entry
129 ldr r1, =_mdata /* .data start in image */
130 ldr r2, =_data_end /* .data end in image */
131 ldr r3, =_data_start /* sram data start */
133 ldr r0, [r1, #0]
144 ldr r1,=__bss_start__ /* bss start */
145 ldr r2,=__bss_end__ /* bss end */
153 ldr r0, =__ctors_start__
154 ldr r1, =__ctors_end__
159 ldr r2, [r0], #4
378 ldr r0, ESMSR1_REG @ load the ESMSR1 status register address
379 ldr r2, ESMSR1_ERR_CLR
382 ldr r0, ESMSR2_REG @ load the ESMSR2 status register address
383 ldr r2, ESMSR2_ERR_CLR
386 ldr r0, ESMSSR2_REG @ load the ESMSSR2 status register address
387 ldr r2, ESMSSR2_ERR_CLR
390 ldr r0, ESMKEY_REG @ load the ESMKEY register address
394 ldr r0, VIM_INTREQ @ load the INTREQ register address
395 ldr r2, VIM_INT_CLR
397 ldr r0, CCMR4_STAT_REG @ load the CCMR4 status register address
398 ldr r2, CCMR4_ERR_CLR