Lines Matching refs:PPC_REG_VAL
27 #define PPC_128MB_SACR_VALUE(addr) PPC_REG_VAL(PPC_128MB_SACR_BIT(addr),1)
838 #define SDR0_SRST_BGO PPC_REG_VAL(0, 1)
839 #define SDR0_SRST_PLB4 PPC_REG_VAL(1, 1)
840 #define SDR0_SRST_EBC PPC_REG_VAL(2, 1)
841 #define SDR0_SRST_OPB PPC_REG_VAL(3, 1)
842 #define SDR0_SRST_UART0 PPC_REG_VAL(4, 1)
843 #define SDR0_SRST_UART1 PPC_REG_VAL(5, 1)
844 #define SDR0_SRST_IIC0 PPC_REG_VAL(6, 1)
845 #define SDR0_SRST_BGI PPC_REG_VAL(7, 1)
846 #define SDR0_SRST_GPIO PPC_REG_VAL(8, 1)
847 #define SDR0_SRST_GPT PPC_REG_VAL(9, 1)
848 #define SDR0_SRST_DMC PPC_REG_VAL(10, 1)
849 #define SDR0_SRST_RGMII PPC_REG_VAL(11, 1)
850 #define SDR0_SRST_EMAC0 PPC_REG_VAL(12, 1)
851 #define SDR0_SRST_EMAC1 PPC_REG_VAL(13, 1)
852 #define SDR0_SRST_CPM PPC_REG_VAL(14, 1)
853 #define SDR0_SRST_EPLL PPC_REG_VAL(15, 1)
854 #define SDR0_SRST_UIC PPC_REG_VAL(16, 1)
855 #define SDR0_SRST_UPRST PPC_REG_VAL(17, 1)
856 #define SDR0_SRST_IIC1 PPC_REG_VAL(18, 1)
857 #define SDR0_SRST_SCP PPC_REG_VAL(19, 1)
858 #define SDR0_SRST_UHRST PPC_REG_VAL(20, 1)
859 #define SDR0_SRST_DMA PPC_REG_VAL(21, 1)
860 #define SDR0_SRST_DMAC PPC_REG_VAL(22, 1)
861 #define SDR0_SRST_MAL PPC_REG_VAL(23, 1)
862 #define SDR0_SRST_EBM PPC_REG_VAL(24, 1)
863 #define SDR0_SRST_GPTR PPC_REG_VAL(25, 1)
864 #define SDR0_SRST_PE0 PPC_REG_VAL(26, 1)
865 #define SDR0_SRST_PE1 PPC_REG_VAL(27, 1)
866 #define SDR0_SRST_CRYP PPC_REG_VAL(28, 1)
867 #define SDR0_SRST_PKP PPC_REG_VAL(29, 1)
868 #define SDR0_SRST_AHB PPC_REG_VAL(30, 1)
869 #define SDR0_SRST_NDFC PPC_REG_VAL(31, 1)