Lines Matching refs:sp
71 addi sp, sp, -CTX_FPU_REG_NR * REGBYTES
75 addi sp, sp, -CTX_VECTOR_REG_NR * REGBYTES
79 addi sp, sp, -CTX_GENERAL_REG_NR * REGBYTES
80 STORE x1, 1 * REGBYTES(sp)
83 STORE x1, FRAME_OFF_SSTATUS(sp)
86 STORE x1, 0 * REGBYTES(sp)
88 STORE x3, 3 * REGBYTES(sp)
89 STORE x4, 4 * REGBYTES(sp) /* save tp */
90 STORE x5, 5 * REGBYTES(sp)
91 STORE x6, 6 * REGBYTES(sp)
92 STORE x7, 7 * REGBYTES(sp)
93 STORE x8, 8 * REGBYTES(sp)
94 STORE x9, 9 * REGBYTES(sp)
95 STORE x10, 10 * REGBYTES(sp)
96 STORE x11, 11 * REGBYTES(sp)
97 STORE x12, 12 * REGBYTES(sp)
98 STORE x13, 13 * REGBYTES(sp)
99 STORE x14, 14 * REGBYTES(sp)
100 STORE x15, 15 * REGBYTES(sp)
101 STORE x16, 16 * REGBYTES(sp)
102 STORE x17, 17 * REGBYTES(sp)
103 STORE x18, 18 * REGBYTES(sp)
104 STORE x19, 19 * REGBYTES(sp)
105 STORE x20, 20 * REGBYTES(sp)
106 STORE x21, 21 * REGBYTES(sp)
107 STORE x22, 22 * REGBYTES(sp)
108 STORE x23, 23 * REGBYTES(sp)
109 STORE x24, 24 * REGBYTES(sp)
110 STORE x25, 25 * REGBYTES(sp)
111 STORE x26, 26 * REGBYTES(sp)
112 STORE x27, 27 * REGBYTES(sp)
113 STORE x28, 28 * REGBYTES(sp)
114 STORE x29, 29 * REGBYTES(sp)
115 STORE x30, 30 * REGBYTES(sp)
116 STORE x31, 31 * REGBYTES(sp)
118 STORE t0, 32 * REGBYTES(sp)
122 mv t1, sp
175 addi t1, sp, (CTX_GENERAL_REG_NR + CTX_FPU_REG_NR) * REGBYTES
190 ld t0, 2 * REGBYTES(sp)
196 addi t1, sp, (CTX_GENERAL_REG_NR + CTX_FPU_REG_NR) * REGBYTES
204 addi t2, sp, CTX_GENERAL_REG_NR * REGBYTES
251 addi t0, sp, CTX_REG_NR * REGBYTES
255 LOAD x1, 0 * REGBYTES(sp)
258 LOAD x1, 2 * REGBYTES(sp)
261 LOAD x1, 1 * REGBYTES(sp)
263 LOAD x3, 3 * REGBYTES(sp)
264 LOAD x4, 4 * REGBYTES(sp) /* restore tp */
265 LOAD x5, 5 * REGBYTES(sp)
266 LOAD x6, 6 * REGBYTES(sp)
267 LOAD x7, 7 * REGBYTES(sp)
268 LOAD x8, 8 * REGBYTES(sp)
269 LOAD x9, 9 * REGBYTES(sp)
270 LOAD x10, 10 * REGBYTES(sp)
271 LOAD x11, 11 * REGBYTES(sp)
272 LOAD x12, 12 * REGBYTES(sp)
273 LOAD x13, 13 * REGBYTES(sp)
274 LOAD x14, 14 * REGBYTES(sp)
275 LOAD x15, 15 * REGBYTES(sp)
276 LOAD x16, 16 * REGBYTES(sp)
277 LOAD x17, 17 * REGBYTES(sp)
278 LOAD x18, 18 * REGBYTES(sp)
279 LOAD x19, 19 * REGBYTES(sp)
280 LOAD x20, 20 * REGBYTES(sp)
281 LOAD x21, 21 * REGBYTES(sp)
282 LOAD x22, 22 * REGBYTES(sp)
283 LOAD x23, 23 * REGBYTES(sp)
284 LOAD x24, 24 * REGBYTES(sp)
285 LOAD x25, 25 * REGBYTES(sp)
286 LOAD x26, 26 * REGBYTES(sp)
287 LOAD x27, 27 * REGBYTES(sp)
288 LOAD x28, 28 * REGBYTES(sp)
289 LOAD x29, 29 * REGBYTES(sp)
290 LOAD x30, 30 * REGBYTES(sp)
291 LOAD x31, 31 * REGBYTES(sp)
294 LOAD sp, 32 * REGBYTES(sp)