Lines Matching refs:hw_base
35 struct rt_mb_uart_lite_hw* hw_base; member
67 status = serial->hw_base->STAT_REG; in rt_hw_serial_isr()
71 serial->rx_buffer[serial->save_index] = serial->hw_base->Rx_FIFO; in rt_hw_serial_isr()
85 status = serial->hw_base->STAT_REG; in rt_hw_serial_isr()
123 serial->hw_base->CTRL_REG = XUL_CR_ENABLE_INTR; /* enable interrupt */ in rt_serial_open()
141 serial->hw_base->CTRL_REG = 0; /* RxReady interrupt */ in rt_serial_close()
201 while (!(serial->hw_base->STAT_REG & XUL_SR_RX_FIFO_VALID_DATA)); in rt_serial_read()
204 *ptr = serial->hw_base->Rx_FIFO; in rt_serial_read()
232 while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY)); in rt_serial_write()
233 serial->hw_base->Tx_FIFO = '\r'; in rt_serial_write()
237 while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY)); in rt_serial_write()
240 serial->hw_base->Tx_FIFO = *ptr; in rt_serial_write()
253 while (!(serial->hw_base->STAT_REG & XUL_SR_TX_FIFO_EMPTY)); in rt_serial_write()
256 serial->hw_base->Tx_FIFO = *ptr; in rt_serial_write()
296 serial1.hw_base = (struct rt_mb_uart_lite_hw*)XPAR_USB_UART_BASEADDR; in rt_hw_serial_init()