/*
* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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#ifndef __MBUS_SUN20IW1_H__
#define __MBUS_SUN20IW1_H__

typedef struct {
    uint32_t MC_MCGCR;
    uint32_t MC_CPU_BWCR;
    uint32_t MC_RV_SYS_BWCR;
    uint32_t MC_MAHB_BWCR;
    uint32_t MC_DMA_BWCR;
    uint32_t MC_VE_BWCR;
    uint32_t MC_CE_BWCR;
    uint32_t MC_TVD_BWCR;
    uint32_t MC_CSI_BWCR;
    uint32_t MC_DSP_SYS_BWCR;
    uint32_t MC_G2D_BWCR;
    uint32_t MC_DI_BWCR;
    uint32_t MC_DE_BWCR;
    uint32_t MC_IOMMU_BWCR;
    uint32_t MC_XXX_BWCR;
    uint32_t MC_OTHER_BWCR;
    uint32_t MC_TOTAL_BWCR;
}MBUS_PMU_REGISTER_T;


#define MBUS_CTRL_BASE  0x03102000
#define MBUS_PMU_BASE   (MBUS_CTRL_BASE + 0x009c)

#define MBUS_PMU        ((MBUS_PMU_REGISTER_T *)(MBUS_PMU_BASE))

#endif