/*
* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
*
* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
* the the People's Republic of China and other countries.
* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
*
* DISCLAIMER
* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
* IF YOU NEED TO INTEGRATE THIRD PARTY¡¯S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
* IN ALLWINNERS¡¯SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY¡¯S TECHNOLOGY.
*
*
* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE.
*/

#ifndef __TWI_SUN8IW18_H__
#define __TWI_SUN8IW18_H__

/** the base address of TWI*/
#define SUNXI_TWI0_PBASE 0x05002000
#define SUNXI_TWI1_PBASE 0x05002400
#define SUNXI_TWI2_PBASE 0x05002800
#define SUNXI_TWI3_PBASE 0x05002c00
#define SUNXI_S_TWI0_PBASE 0x07081400

/** the irq of each TWI **/
#define SUNXI_GIC_START 32
#define SUNXI_IRQ_TWI0 (SUNXI_GIC_START + 70)
#define SUNXI_IRQ_TWI1 (SUNXI_GIC_START + 71)
#define SUNXI_IRQ_TWI2 -1
#define SUNXI_IRQ_TWI3 -1
#define SUNXI_IRQ_S_TWI0 -1

#define TWI0_PIN_MUXSEL 2
#define TWI1_PIN_MUXSEL 2
#define TWI2_PIN_MUXSEL 4
#define TWI3_PIN_MUXSEL 5
#define S_TWI0_PIN_MUXSEL 3
#define TWI_DISABLE_PIN_MUXSEL 7
#define TWI_PULL_STATE 1
#define TWI_DRIVE_STATE 0

#define TWI0_SCK GPIOH(0)
#define TWI0_SDA GPIOH(1)
#define TWI1_SCK GPIOH(2)
#define TWI1_SDA GPIOH(3)
#define TWI2_SCK -1
#define TWI2_SDA -1
#define TWI3_SCK -1
#define TWI3_SDA -1
#define S_TWI0_SCK -1
#define S_TWI0_SDA -1

#endif /*__TWI_SUN8IW18_H__  */