1 /**
2 ******************************************************************************
3 * @file ft32f0xx_adc.c
4 * @author FMD AE
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC) peripheral:
7 * + Initialization and Configuration
8 * + Power saving
9 * + Analog Watchdog configuration
10 * + Temperature Sensor, Vrefint (Internal Reference Voltage) and
11 * Vbat (Voltage battery) management
12 * + ADC Channels Configuration
13 * + ADC Channels DMA Configuration
14 * + Interrupts and flags management.
15 * @version V1.0.0
16 * @data 2021-07-01
17 ******************************************************************************
18 */
19
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "ft32f0xx_adc.h"
23 #include "ft32f0xx_rcc.h"
24
25
26
27 /* ADC CFGR mask */
28 #define CFGR1_CLEAR_MASK ((uint32_t)0xFFFFD203)
29
30 /* Calibration time out */
31 #define CALIBRATION_TIMEOUT ((uint32_t)0x0000F000)
32
33 /**
34 * @brief Deinitializes ADC1 peripheral registers to their default reset values.
35 * @param ADCx: where x can be 1 to select the ADC peripheral.
36 * @retval None
37 */
ADC_DeInit(ADC_TypeDef * ADCx)38 void ADC_DeInit(ADC_TypeDef* ADCx)
39 {
40 /* Check the parameters */
41 assert_param(IS_ADC_ALL_PERIPH(ADCx));
42
43 if(ADCx == ADC1)
44 {
45 /* Enable ADC1 reset state */
46 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
47
48 /* Release ADC1 from reset state */
49 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
50 }
51 }
52
53 /**
54 * @brief Initializes the ADCx peripheral according to the specified parameters
55 * in the ADC_InitStruct.
56 * @note This function is used to configure the global features of the ADC (
57 * Resolution, Data Alignment, continuous mode activation, External
58 * trigger source and edge, Sequence Scan Direction).
59 * @param ADCx: where x can be 1 to select the ADC peripheral.
60 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
61 * the configuration information for the specified ADC peripheral.
62 * @retval None
63 */
ADC_Init(ADC_TypeDef * ADCx,ADC_InitTypeDef * ADC_InitStruct)64 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
65 {
66 uint32_t tmpreg = 0;
67
68 /* Check the parameters */
69 assert_param(IS_ADC_ALL_PERIPH(ADCx));
70 assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution));
71 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
72 assert_param(IS_ADC_EXT_TRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigConvEdge));
73 assert_param(IS_ADC_EXTERNAL_TRIG_CONV(ADC_InitStruct->ADC_ExternalTrigConv));
74 assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
75 assert_param(IS_ADC_SCAN_DIRECTION(ADC_InitStruct->ADC_ScanDirection));
76
77 /* Get the ADCx CFGR value */
78 tmpreg = ADCx->CFGR1;
79
80 /* Clear SCANDIR, RES[1:0], ALIGN, EXTSEL[2:0], EXTEN[1:0] and CONT bits */
81 tmpreg &= CFGR1_CLEAR_MASK;
82
83 /*---------------------------- ADCx CFGR Configuration ---------------------*/
84
85 /* Set RES[1:0] bits according to ADC_Resolution value */
86 /* Set CONT bit according to ADC_ContinuousConvMode value */
87 /* Set EXTEN[1:0] bits according to ADC_ExternalTrigConvEdge value */
88 /* Set EXTSEL[2:0] bits according to ADC_ExternalTrigConv value */
89 /* Set ALIGN bit according to ADC_DataAlign value */
90 /* Set SCANDIR bit according to ADC_ScanDirection value */
91
92 tmpreg |= (uint32_t)(ADC_InitStruct->ADC_Resolution | ((uint32_t)(ADC_InitStruct->ADC_ContinuousConvMode) << 13) |
93 ADC_InitStruct->ADC_ExternalTrigConvEdge | ADC_InitStruct->ADC_ExternalTrigConv |
94 ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ScanDirection);
95
96 /* Write to ADCx CFGR */
97 ADCx->CFGR1 = tmpreg;
98 }
99
100 /**
101 * @brief Fills each ADC_InitStruct member with its default value.
102 * @note This function is used to initialize the global features of the ADC (
103 * Resolution, Data Alignment, continuous mode activation, External
104 * trigger source and edge, Sequence Scan Direction).
105 * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure which will
106 * be initialized.
107 * @retval None
108 */
ADC_StructInit(ADC_InitTypeDef * ADC_InitStruct)109 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
110 {
111 /* Reset ADC init structure parameters values */
112 /* Initialize the ADC_Resolution member */
113 ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;
114
115 /* Initialize the ADC_ContinuousConvMode member */
116 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
117
118 /* Initialize the ADC_ExternalTrigConvEdge member */
119 ADC_InitStruct->ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
120
121 /* Initialize the ADC_ExternalTrigConv member */
122 ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_TRGO;
123
124 /* Initialize the ADC_DataAlign member */
125 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
126
127 /* Initialize the ADC_ScanDirection member */
128 ADC_InitStruct->ADC_ScanDirection = ADC_ScanDirection_Upward;
129 }
130
131 /**
132 * @brief Enables or disables the specified ADC peripheral.
133 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
134 * @param NewState: new state of the ADCx peripheral.
135 * This parameter can be: ENABLE or DISABLE.
136 * @retval None
137 */
ADC_Cmd(ADC_TypeDef * ADCx,FunctionalState NewState)138 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
139 {
140 /* Check the parameters */
141 assert_param(IS_ADC_ALL_PERIPH(ADCx));
142 assert_param(IS_FUNCTIONAL_STATE(NewState));
143
144 if (NewState != DISABLE)
145 {
146 /* Set the ADEN bit to Enable the ADC peripheral */
147 ADCx->CR |= (uint32_t)ADC_CR_ADEN;
148 }
149 else
150 {
151 /* Set the ADDIS to Disable the ADC peripheral */
152 ADCx->CR |= (uint32_t)ADC_CR_ADDIS;
153 }
154 }
155
156 /**
157 * @brief Configure the ADC to either be clocked by the asynchronous clock(which is
158 * independent, the dedicated 14MHz clock) or the synchronous clock derived from
159 * the APB clock of the ADC bus interface divided by 2 or 4
160 * @note This function can be called only when ADC is disabled.
161 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
162 * @param ADC_ClockMode: This parameter can be :
163 * @arg ADC_ClockMode_AsynClk: ADC clocked by the dedicated 14MHz clock
164 * @arg ADC_ClockMode_SynClkDiv2: ADC clocked by PCLK/2
165 * @arg ADC_ClockMode_SynClkDiv4: ADC clocked by PCLK/4
166 * @retval None
167 */
ADC_ClockModeConfig(ADC_TypeDef * ADCx,uint32_t ADC_ClockMode)168 void ADC_ClockModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ClockMode)
169 {
170 /* Check the parameters */
171 assert_param(IS_ADC_ALL_PERIPH(ADCx));
172 assert_param(IS_ADC_CLOCKMODE(ADC_ClockMode));
173
174 /* Configure the ADC Clock mode according to ADC_ClockMode */
175 ADCx->CFGR2 = (uint32_t)ADC_ClockMode;
176
177 }
178
179 /**
180 * @brief Enables or disables the jitter when the ADC is clocked by PCLK div2
181 * or div4
182 * @note This function is obsolete and maintained for legacy purpose only. ADC_ClockModeConfig()
183 * function should be used instead.
184 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
185 * @param ADC_JitterOff: This parameter can be :
186 * @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2
187 * @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4
188 * @param NewState: new state of the ADCx jitter.
189 * This parameter can be: ENABLE or DISABLE.
190 * @retval None
191 */
ADC_JitterCmd(ADC_TypeDef * ADCx,uint32_t ADC_JitterOff,FunctionalState NewState)192 void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState)
193 {
194 /* Check the parameters */
195 assert_param(IS_ADC_ALL_PERIPH(ADCx));
196 assert_param(IS_ADC_JITTEROFF(ADC_JitterOff));
197 assert_param(IS_FUNCTIONAL_STATE(NewState));
198
199 if (NewState != DISABLE)
200 {
201 /* Disable Jitter */
202 ADCx->CFGR2 |= (uint32_t)ADC_JitterOff;
203 }
204 else
205 {
206 /* Enable Jitter */
207 ADCx->CFGR2 &= (uint32_t)(~ADC_JitterOff);
208 }
209 }
210
211 /**
212 * @}
213 */
214
215 /**
216 * @brief Enables or disables the ADC Power Off.
217 * @note ADC power-on and power-off can be managed by hardware to cut the
218 * consumption when the ADC is not converting.
219 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
220 * @note The ADC can be powered down:
221 * - During the Auto delay phase: The ADC is powered on again at the end
222 * of the delay (until the previous data is read from the ADC data register).
223 * - During the ADC is waiting for a trigger event: The ADC is powered up
224 * at the next trigger event (when the conversion is started).
225 * @param NewState: new state of the ADCx power Off.
226 * This parameter can be: ENABLE or DISABLE.
227 * @retval None
228 */
ADC_AutoPowerOffCmd(ADC_TypeDef * ADCx,FunctionalState NewState)229 void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
230 {
231 /* Check the parameters */
232 assert_param(IS_ADC_ALL_PERIPH(ADCx));
233 assert_param(IS_FUNCTIONAL_STATE(NewState));
234
235 if (NewState != DISABLE)
236 {
237 /* Enable the ADC Automatic Power-Off */
238 ADCx->CFGR1 |= ADC_CFGR1_AUTOFF;
239 }
240 else
241 {
242 /* Disable the ADC Automatic Power-Off */
243 ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AUTOFF;
244 }
245 }
246
247 /**
248 * @brief Enables or disables the Wait conversion mode.
249 * @note When the CPU clock is not fast enough to manage the data rate, a
250 * Hardware delay can be introduced between ADC conversions to reduce
251 * this data rate.
252 * @note The Hardware delay is inserted after each conversions and until the
253 * previous data is read from the ADC data register
254 * @note This is a way to automatically adapt the speed of the ADC to the speed
255 * of the system which will read the data.
256 * @note Any hardware triggers wich occur while a conversion is on going or
257 * while the automatic Delay is applied are ignored
258 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
259 * @param NewState: new state of the ADCx Auto-Delay.
260 * This parameter can be: ENABLE or DISABLE.
261 * @retval None
262 */
ADC_WaitModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)263 void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
264 {
265 /* Check the parameters */
266 assert_param(IS_ADC_ALL_PERIPH(ADCx));
267 assert_param(IS_FUNCTIONAL_STATE(NewState));
268
269 if (NewState != DISABLE)
270 {
271 /* Enable the ADC Automatic Delayed conversion */
272 ADCx->CFGR1 |= ADC_CFGR1_WAIT;
273 }
274 else
275 {
276 /* Disable the ADC Automatic Delayed conversion */
277 ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_WAIT;
278 }
279 }
280
281 /**
282 * @}
283 */
284 /**
285 * @brief Enables or disables the analog watchdog
286 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
287 * @param NewState: new state of the ADCx Analog Watchdog.
288 * This parameter can be: ENABLE or DISABLE.
289 * @retval None
290 */
ADC_AnalogWatchdogCmd(ADC_TypeDef * ADCx,FunctionalState NewState)291 void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
292 {
293 /* Check the parameters */
294 assert_param(IS_ADC_ALL_PERIPH(ADCx));
295 assert_param(IS_FUNCTIONAL_STATE(NewState));
296
297 if (NewState != DISABLE)
298 {
299 /* Enable the ADC Analog Watchdog */
300 ADCx->CFGR1 |= ADC_CFGR1_AWDEN;
301 }
302 else
303 {
304 /* Disable the ADC Analog Watchdog */
305 ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AWDEN;
306 }
307 }
308
309 /**
310 * @brief Configures the high and low thresholds of the analog watchdog.
311 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
312 * @param HighThreshold: the ADC analog watchdog High threshold value.
313 * This parameter must be a 12bit value.
314 * @param LowThreshold: the ADC analog watchdog Low threshold value.
315 * This parameter must be a 12bit value.
316 * @retval None
317 */
ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef * ADCx,uint16_t HighThreshold,uint16_t LowThreshold)318 void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
319 uint16_t LowThreshold)
320 {
321 /* Check the parameters */
322 assert_param(IS_ADC_ALL_PERIPH(ADCx));
323 assert_param(IS_ADC_THRESHOLD(HighThreshold));
324 assert_param(IS_ADC_THRESHOLD(LowThreshold));
325
326 /* Set the ADCx high and low threshold */
327 ADCx->TR = LowThreshold | ((uint32_t)HighThreshold << 16);
328
329 }
330
331 /**
332 * @brief Configures the analog watchdog guarded single channel
333 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
334 * @param ADC_AnalogWatchdog_Channel: the ADC channel to configure for the analog watchdog.
335 * This parameter can be one of the following values:
336 * @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected
337 * @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected
338 * @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected
339 * @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected
340 * @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected
341 * @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected
342 * @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected
343 * @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected
344 * @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected
345 * @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected
346 * @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected
347 * @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected
348 * @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected
349 * @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected
350 * @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected
351 * @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected
352 * @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected
353 * @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected
354 * @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected
355 * @note The channel selected on the AWDCH must be also set into the CHSELR
356 * register
357 * @retval None
358 */
ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef * ADCx,uint32_t ADC_AnalogWatchdog_Channel)359 void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog_Channel)
360 {
361 uint32_t tmpreg = 0;
362
363 /* Check the parameters */
364 assert_param(IS_ADC_ALL_PERIPH(ADCx));
365 assert_param(IS_ADC_ANALOG_WATCHDOG_CHANNEL(ADC_AnalogWatchdog_Channel));
366
367 /* Get the old register value */
368 tmpreg = ADCx->CFGR1;
369
370 /* Clear the Analog watchdog channel select bits */
371 tmpreg &= ~ADC_CFGR1_AWDCH;
372
373 /* Set the Analog watchdog channel */
374 tmpreg |= ADC_AnalogWatchdog_Channel;
375
376 /* Store the new register value */
377 ADCx->CFGR1 = tmpreg;
378 }
379
380 /**
381 * @brief Enables or disables the ADC Analog Watchdog Single Channel.
382 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
383 * @param NewState: new state of the ADCx ADC Analog Watchdog Single Channel.
384 * This parameter can be: ENABLE or DISABLE.
385 * @retval None
386 */
ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef * ADCx,FunctionalState NewState)387 void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
388 {
389 /* Check the parameters */
390 assert_param(IS_ADC_ALL_PERIPH(ADCx));
391 assert_param(IS_FUNCTIONAL_STATE(NewState));
392
393 if (NewState != DISABLE)
394 {
395 /* Enable the ADC Analog Watchdog Single Channel */
396 ADCx->CFGR1 |= ADC_CFGR1_AWDSGL;
397 }
398 else
399 {
400 /* Disable the ADC Analog Watchdog Single Channel */
401 ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AWDSGL;
402 }
403 }
404
405 /**
406 * @}
407 */
408 /**
409 * @brief Enables or disables the temperature sensor channel.
410 * @param NewState: new state of the temperature sensor input channel.
411 * This parameter can be: ENABLE or DISABLE.
412 * @retval None
413 */
ADC_TempSensorCmd(FunctionalState NewState)414 void ADC_TempSensorCmd(FunctionalState NewState)
415 {
416 /* Check the parameters */
417 assert_param(IS_FUNCTIONAL_STATE(NewState));
418
419 if (NewState != DISABLE)
420 {
421 /* Enable the temperature sensor channel*/
422 ADC->CCR |= (uint32_t)ADC_CCR_TSEN;
423 }
424 else
425 {
426 /* Disable the temperature sensor channel*/
427 ADC->CCR &= (uint32_t)(~ADC_CCR_TSEN);
428 }
429 }
430
431 /**
432 * @brief Enables or disables the Vrefint channel.
433 * @param NewState: new state of the Vref input channel.
434 * This parameter can be: ENABLE or DISABLE.
435 * @retval None
436 */
ADC_VrefintCmd(FunctionalState NewState)437 void ADC_VrefintCmd(FunctionalState NewState)
438 {
439 /* Check the parameters */
440 assert_param(IS_FUNCTIONAL_STATE(NewState));
441
442 if (NewState != DISABLE)
443 {
444 /* Enable the Vrefint channel*/
445 ADC->CCR |= (uint32_t)ADC_CCR_VREFEN;
446 }
447 else
448 {
449 /* Disable the Vrefint channel*/
450 ADC->CCR &= (uint32_t)(~ADC_CCR_VREFEN);
451 }
452 }
453
454 /**
455 * @brief Enables or disables the Vbat channel.
456 * @note This feature is not applicable for FT32F030 devices.
457 * @param NewState: new state of the Vbat input channel.
458 * This parameter can be: ENABLE or DISABLE.
459 * @retval None
460 */
ADC_VbatCmd(FunctionalState NewState)461 void ADC_VbatCmd(FunctionalState NewState)
462 {
463 /* Check the parameters */
464 assert_param(IS_FUNCTIONAL_STATE(NewState));
465
466 if (NewState != DISABLE)
467 {
468 /* Enable the Vbat channel*/
469 ADC->CCR |= (uint32_t)ADC_CCR_VBATEN;
470 }
471 else
472 {
473 /* Disable the Vbat channel*/
474 ADC->CCR &= (uint32_t)(~ADC_CCR_VBATEN);
475 }
476 }
477
478 /**
479 * @}
480 */
481 /**
482 * @brief Configures for the selected ADC and its sampling time.
483 * @param ADCx: where x can be 1 to select the ADC peripheral.
484 * @param ADC_Channel: the ADC channel to configure.
485 * This parameter can be any combination of the following values:
486 * @arg ADC_Channel_0: ADC Channel0 selected
487 * @arg ADC_Channel_1: ADC Channel1 selected
488 * @arg ADC_Channel_2: ADC Channel2 selected
489 * @arg ADC_Channel_3: ADC Channel3 selected
490 * @arg ADC_Channel_4: ADC Channel4 selected
491 * @arg ADC_Channel_5: ADC Channel5 selected
492 * @arg ADC_Channel_6: ADC Channel6 selected
493 * @arg ADC_Channel_7: ADC Channel7 selected
494 * @arg ADC_Channel_8: ADC Channel8 selected
495 * @arg ADC_Channel_9: ADC Channel9 selected
496 * @arg ADC_Channel_10: ADC Channel10 selected,
497 * @arg ADC_Channel_11: ADC Channel11 selected,
498 * @arg ADC_Channel_12: ADC Channel12 selected,
499 * @arg ADC_Channel_13: ADC Channel13 selected,
500 * @arg ADC_Channel_14: ADC Channel14 selected,
501 * @arg ADC_Channel_15: ADC Channel15 selected,
502 * @arg ADC_Channel_16: ADC Channel16 selected
503 * @arg ADC_Channel_17: ADC Channel17 selected
504 * @arg ADC_Channel_18: ADC Channel18 selected,
505 * @arg ADC_Channel_19: ADC Channel19 selected,
506 * @arg ADC_Channel_20: ADC Channel20 selected,
507 * @arg ADC_Channel_21: ADC Channel21 selected,
508 * @param ADC_SampleTime: The sample time value to be set for the selected channel.
509 * This parameter can be one of the following values:
510 * @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles
511 * @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles
512 * @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles
513 * @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles
514 * @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles
515 * @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles
516 * @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles
517 * @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles
518 * @retval None
519 */
ADC_ChannelConfig(ADC_TypeDef * ADCx,uint32_t ADC_Channel,uint32_t ADC_SampleTime)520 void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime)
521 {
522 uint32_t tmpreg = 0;
523
524 /* Check the parameters */
525 assert_param(IS_ADC_ALL_PERIPH(ADCx));
526 assert_param(IS_ADC_CHANNEL(ADC_Channel));
527 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
528
529 /* Configure the ADC Channel */
530 ADCx->CHSELR |= (uint32_t)ADC_Channel;
531
532 /* Clear the Sampling time Selection bits */
533 tmpreg &= ~ADC_SMPR1_SMPR;
534
535 /* Set the ADC Sampling Time register */
536 tmpreg |= (uint32_t)ADC_SampleTime;
537
538 /* Configure the ADC Sample time register */
539 ADCx->SMPR = tmpreg ;
540 }
541
542 /**
543 * @brief Enable the Continuous mode for the selected ADCx channels.
544 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
545 * @param NewState: new state of the Continuous mode.
546 * This parameter can be: ENABLE or DISABLE.
547 * @note It is not possible to have both discontinuous mode and continuous mode
548 * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
549 * as if continuous mode was disabled
550 * @retval None
551 */
ADC_ContinuousModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)552 void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
553 {
554 /* Check the parameters */
555 assert_param(IS_ADC_ALL_PERIPH(ADCx));
556 assert_param(IS_FUNCTIONAL_STATE(NewState));
557
558 if (NewState != DISABLE)
559 {
560 /* Enable the Continuous mode*/
561 ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_CONT;
562 }
563 else
564 {
565 /* Disable the Continuous mode */
566 ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_CONT);
567 }
568 }
569
570 /**
571 * @brief Enable the discontinuous mode for the selected ADC channels.
572 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
573 * @param NewState: new state of the discontinuous mode.
574 * This parameter can be: ENABLE or DISABLE.
575 * @note It is not possible to have both discontinuous mode and continuous mode
576 * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
577 * as if continuous mode was disabled
578 * @retval None
579 */
ADC_DiscModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)580 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
581 {
582 /* Check the parameters */
583 assert_param(IS_ADC_ALL_PERIPH(ADCx));
584 assert_param(IS_FUNCTIONAL_STATE(NewState));
585
586 if (NewState != DISABLE)
587 {
588 /* Enable the Discontinuous mode */
589 ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_DISCEN;
590 }
591 else
592 {
593 /* Disable the Discontinuous mode */
594 ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_DISCEN);
595 }
596 }
597
598 /**
599 * @brief Enable the Overrun mode for the selected ADC channels.
600 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
601 * @param NewState: new state of the Overrun mode.
602 * This parameter can be: ENABLE or DISABLE.
603 * @retval None
604 */
ADC_OverrunModeCmd(ADC_TypeDef * ADCx,FunctionalState NewState)605 void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
606 {
607 /* Check the parameters */
608 assert_param(IS_ADC_ALL_PERIPH(ADCx));
609 assert_param(IS_FUNCTIONAL_STATE(NewState));
610
611 if (NewState != DISABLE)
612 {
613 /* Enable the Overrun mode */
614 ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_OVRMOD;
615 }
616 else
617 {
618 /* Disable the Overrun mode */
619 ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_OVRMOD);
620 }
621 }
622
623 /**
624 * @brief Active the Calibration operation for the selected ADC.
625 * @note The Calibration can be initiated only when ADC is still in the
626 * reset configuration (ADEN must be equal to 0).
627 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
628 * @retval ADC Calibration factor
629 */
ADC_GetCalibrationFactor(ADC_TypeDef * ADCx)630 uint32_t ADC_GetCalibrationFactor(ADC_TypeDef* ADCx)
631 {
632 uint32_t tmpreg = 0, calibrationcounter = 0, calibrationstatus = 0;
633
634 /* Check the parameters */
635 assert_param(IS_ADC_ALL_PERIPH(ADCx));
636
637 /* Set the ADC calibartion */
638 ADCx->CR |= (uint32_t)ADC_CR_ADCAL;
639
640 /* Wait until no ADC calibration is completed */
641 do
642 {
643 calibrationstatus = ADCx->CR & ADC_CR_ADCAL;
644 calibrationcounter++;
645 } while((calibrationcounter != CALIBRATION_TIMEOUT) && (calibrationstatus != 0x00));
646
647 if((uint32_t)(ADCx->CR & ADC_CR_ADCAL) == RESET)
648 {
649 /*Get the calibration factor from the ADC data register */
650 tmpreg = ADCx->DR;
651 }
652 else
653 {
654 /* Error factor */
655 tmpreg = 0x00000000;
656 }
657 return tmpreg;
658 }
659
660 /**
661 * @brief Stop the on going conversions for the selected ADC.
662 * @note When ADSTP is set, any on going conversion is aborted, and the ADC
663 * data register is not updated with current conversion.
664 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
665 * @retval None
666 */
ADC_StopOfConversion(ADC_TypeDef * ADCx)667 void ADC_StopOfConversion(ADC_TypeDef* ADCx)
668 {
669 /* Check the parameters */
670 assert_param(IS_ADC_ALL_PERIPH(ADCx));
671
672 ADCx->CR |= (uint32_t)ADC_CR_ADSTP;
673 }
674
675 /**
676 * @brief Start Conversion for the selected ADC channels.
677 * @note In continuous mode, ADSTART is not cleared by hardware with the
678 * assertion of EOSEQ because the sequence is automatic relaunched
679 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
680 * @retval None
681 */
ADC_StartOfConversion(ADC_TypeDef * ADCx)682 void ADC_StartOfConversion(ADC_TypeDef* ADCx)
683 {
684 /* Check the parameters */
685 assert_param(IS_ADC_ALL_PERIPH(ADCx));
686
687 ADCx->CR |= (uint32_t)ADC_CR_ADSTART;
688 }
689
690 /**
691 * @brief Returns the last ADCx conversion result data for ADC channel.
692 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
693 * @retval The Data conversion value.
694 */
ADC_GetConversionValue(ADC_TypeDef * ADCx)695 uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
696 {
697 /* Check the parameters */
698 assert_param(IS_ADC_ALL_PERIPH(ADCx));
699
700 /* Return the selected ADC conversion value */
701 return (uint16_t) ADCx->DR;
702 }
703
704 /**
705 * @}
706 */
707 /**
708 * @brief Enables or disables the specified ADC DMA request.
709 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
710 * @param NewState: new state of the selected ADC DMA transfer.
711 * This parameter can be: ENABLE or DISABLE.
712 * @retval None
713 */
ADC_DMACmd(ADC_TypeDef * ADCx,FunctionalState NewState)714 void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
715 {
716 /* Check the parameters */
717 assert_param(IS_ADC_ALL_PERIPH(ADCx));
718 assert_param(IS_FUNCTIONAL_STATE(NewState));
719
720 if (NewState != DISABLE)
721 {
722 /* Enable the selected ADC DMA request */
723 ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_DMAEN;
724 }
725 else
726 {
727 /* Disable the selected ADC DMA request */
728 ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_DMAEN);
729 }
730 }
731
732 /**
733 * @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode)
734 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
735 * @param ADC_DMARequestMode: the ADC channel to configure.
736 * This parameter can be one of the following values:
737 * @arg ADC_DMAMode_OneShot: DMA One Shot Mode
738 * @arg ADC_DMAMode_Circular: DMA Circular Mode
739 * @retval None
740 */
ADC_DMARequestModeConfig(ADC_TypeDef * ADCx,uint32_t ADC_DMARequestMode)741 void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode)
742 {
743 /* Check the parameters */
744 assert_param(IS_ADC_ALL_PERIPH(ADCx));
745
746 ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_DMACFG;
747 ADCx->CFGR1 |= (uint32_t)ADC_DMARequestMode;
748 }
749
750 /**
751 * @}
752 */
753 /**
754 * @brief Enables or disables the specified ADC interrupts.
755 * @param ADCx: where x can be 1 to select the ADC peripheral.
756 * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
757 * This parameter can be one of the following values:
758 * @arg ADC_IT_ADRDY: ADC ready interrupt
759 * @arg ADC_IT_EOSMP: End of sampling interrupt
760 * @arg ADC_IT_EOC: End of conversion interrupt
761 * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
762 * @arg ADC_IT_OVR: overrun interrupt
763 * @arg ADC_IT_AWD: Analog watchdog interrupt
764 * @param NewState: new state of the specified ADC interrupts.
765 * This parameter can be: ENABLE or DISABLE.
766 * @retval None
767 */
ADC_ITConfig(ADC_TypeDef * ADCx,uint32_t ADC_IT,FunctionalState NewState)768 void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
769 {
770 /* Check the parameters */
771 assert_param(IS_ADC_ALL_PERIPH(ADCx));
772 assert_param(IS_FUNCTIONAL_STATE(NewState));
773 assert_param(IS_ADC_CONFIG_IT(ADC_IT));
774
775 if (NewState != DISABLE)
776 {
777 /* Enable the selected ADC interrupts */
778 ADCx->IER |= ADC_IT;
779 }
780 else
781 {
782 /* Disable the selected ADC interrupts */
783 ADCx->IER &= (~(uint32_t)ADC_IT);
784 }
785 }
786
787 /**
788 * @brief Checks whether the specified ADC flag is set or not.
789 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
790 * @param ADC_FLAG: specifies the flag to check.
791 * This parameter can be one of the following values:
792 * @arg ADC_FLAG_AWD: Analog watchdog flag
793 * @arg ADC_FLAG_OVR: Overrun flag
794 * @arg ADC_FLAG_EOSEQ: End of Sequence flag
795 * @arg ADC_FLAG_EOC: End of conversion flag
796 * @arg ADC_FLAG_EOSMP: End of sampling flag
797 * @arg ADC_FLAG_ADRDY: ADC Ready flag
798 * @arg ADC_FLAG_ADEN: ADC enable flag
799 * @arg ADC_FLAG_ADDIS: ADC disable flag
800 * @arg ADC_FLAG_ADSTART: ADC start flag
801 * @arg ADC_FLAG_ADSTP: ADC stop flag
802 * @arg ADC_FLAG_ADCAL: ADC Calibration flag
803 * @retval The new state of ADC_FLAG (SET or RESET).
804 */
ADC_GetFlagStatus(ADC_TypeDef * ADCx,uint32_t ADC_FLAG)805 FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
806 {
807 FlagStatus bitstatus = RESET;
808 uint32_t tmpreg = 0;
809
810 /* Check the parameters */
811 assert_param(IS_ADC_ALL_PERIPH(ADCx));
812 assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
813
814 if((uint32_t)(ADC_FLAG & 0x01000000))
815 {
816 tmpreg = ADCx->CR & 0xFEFFFFFF;
817 }
818 else
819 {
820 tmpreg = ADCx->ISR;
821 }
822
823 /* Check the status of the specified ADC flag */
824 if ((tmpreg & ADC_FLAG) != (uint32_t)RESET)
825 {
826 /* ADC_FLAG is set */
827 bitstatus = SET;
828 }
829 else
830 {
831 /* ADC_FLAG is reset */
832 bitstatus = RESET;
833 }
834 /* Return the ADC_FLAG status */
835 return bitstatus;
836 }
837
838 /**
839 * @brief Clears the ADCx's pending flags.
840 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
841 * @param ADC_FLAG: specifies the flag to clear.
842 * This parameter can be any combination of the following values:
843 * @arg ADC_FLAG_AWD: Analog watchdog flag
844 * @arg ADC_FLAG_EOC: End of conversion flag
845 * @arg ADC_FLAG_ADRDY: ADC Ready flag
846 * @arg ADC_FLAG_EOSMP: End of sampling flag
847 * @arg ADC_FLAG_EOSEQ: End of Sequence flag
848 * @arg ADC_FLAG_OVR: Overrun flag
849 * @retval None
850 */
ADC_ClearFlag(ADC_TypeDef * ADCx,uint32_t ADC_FLAG)851 void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
852 {
853 /* Check the parameters */
854 assert_param(IS_ADC_ALL_PERIPH(ADCx));
855 assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
856
857 /* Clear the selected ADC flags */
858 ADCx->ISR = (uint32_t)ADC_FLAG;
859 }
860
861 /**
862 * @brief Checks whether the specified ADC interrupt has occurred or not.
863 * @param ADCx: where x can be 1 to select the ADC1 peripheral
864 * @param ADC_IT: specifies the ADC interrupt source to check.
865 * This parameter can be one of the following values:
866 * @arg ADC_IT_ADRDY: ADC ready interrupt
867 * @arg ADC_IT_EOSMP: End of sampling interrupt
868 * @arg ADC_IT_EOC: End of conversion interrupt
869 * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
870 * @arg ADC_IT_OVR: overrun interrupt
871 * @arg ADC_IT_AWD: Analog watchdog interrupt
872 * @retval The new state of ADC_IT (SET or RESET).
873 */
ADC_GetITStatus(ADC_TypeDef * ADCx,uint32_t ADC_IT)874 ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
875 {
876 ITStatus bitstatus = RESET;
877 uint32_t enablestatus = 0;
878
879 /* Check the parameters */
880 assert_param(IS_ADC_ALL_PERIPH(ADCx));
881 assert_param(IS_ADC_GET_IT(ADC_IT));
882
883 /* Get the ADC_IT enable bit status */
884 enablestatus = (uint32_t)(ADCx->IER & ADC_IT);
885
886 /* Check the status of the specified ADC interrupt */
887 if (((uint32_t)(ADCx->ISR & ADC_IT) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
888 {
889 /* ADC_IT is set */
890 bitstatus = SET;
891 }
892 else
893 {
894 /* ADC_IT is reset */
895 bitstatus = RESET;
896 }
897 /* Return the ADC_IT status */
898 return bitstatus;
899 }
900
901 /**
902 * @brief Clears the ADCx's interrupt pending bits.
903 * @param ADCx: where x can be 1 to select the ADC1 peripheral.
904 * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
905 * This parameter can be one of the following values:
906 * @arg ADC_IT_ADRDY: ADC ready interrupt
907 * @arg ADC_IT_EOSMP: End of sampling interrupt
908 * @arg ADC_IT_EOC: End of conversion interrupt
909 * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
910 * @arg ADC_IT_OVR: overrun interrupt
911 * @arg ADC_IT_AWD: Analog watchdog interrupt
912 * @retval None
913 */
ADC_ClearITPendingBit(ADC_TypeDef * ADCx,uint32_t ADC_IT)914 void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT)
915 {
916 /* Check the parameters */
917 assert_param(IS_ADC_ALL_PERIPH(ADCx));
918 assert_param(IS_ADC_CLEAR_IT(ADC_IT));
919
920 /* Clear the selected ADC interrupt pending bits */
921 ADCx->ISR = (uint32_t)ADC_IT;
922 }
923
924
925 /**
926 * @brief select the ADC VREF.
927 * @param ADC_Vrefsel: The sVREF value to be set for the ADC.
928 This parameter can be one of the following values:
929 * @arg ADC_Vrefsel_0_625V: VREF 0.625V selected
930 * @arg ADC_Vrefsel_1_5V: VREF 1.5V selected
931 * @arg ADC_Vrefsel_2_5V: VREF 2.5V selected
932 * @arg ADC_Vrefsel_VDDA: VREF VDDA selected
933 * @retval None
934 */
ADC_VrefselConfig(uint32_t ADC_Vrefsel)935 void ADC_VrefselConfig(uint32_t ADC_Vrefsel)
936 {
937 uint32_t tmpreg = 0;
938 /* Check the parameters */
939 assert_param(IS_ADC_Vrefsel(ADC_Vrefsel));
940
941 /* Read CR2 register */
942 tmpreg = ADC->CR2;
943
944 /* Clear the Vref Selection bits */
945 tmpreg &= ~((uint32_t)0x0000000E) ;
946
947 /* Set the ADC Vref register */
948 tmpreg |= (uint32_t)ADC_Vrefsel;
949
950 /* Configure the ADC Vref register */
951 ADC->CR2 = tmpreg;
952 }
953
954 /**
955 * @brief Enable Reference voltage halved.
956 * @param NewState: new state of the reference voltage halved.
957 * This parameter can be: ENABLE or DISABLE.
958 * @note None
959 * @retval None
960 */
ADC_VrefDecibCmd(FunctionalState NewState)961 void ADC_VrefDecibCmd(FunctionalState NewState)
962 {
963 /* Check the parameters */
964 assert_param(IS_FUNCTIONAL_STATE(NewState));
965
966 if (NewState != DISABLE)
967 {
968 /* Enable the Discontinuous mode */
969 ADC->CR2 |= (uint32_t)ADC_CR2_VREF_DECIB;
970 }
971 else
972 {
973 /* Disable the Discontinuous mode */
974 ADC->CR2 &= (uint32_t)(~ADC_CR2_VREF_DECIB);
975 }
976 }
977
978 /**
979 * @brief Sampling hold circuit sampling enable or disable.
980 * @param SmpEn:
981 * @arg ADC_IOSH1_SMPEN
982 * @arg ADC_IOSH2_SMPEN
983 * @param NewState: new state of SMP.
984 * This parameter can be: ENABLE or DISABLE.
985 * @note None
986 * @retval None
987 */
ADC_IoshSmpCmd(uint32_t SmpEn,FunctionalState NewState)988 void ADC_IoshSmpCmd(uint32_t SmpEn, FunctionalState NewState)
989 {
990 /* Check the parameters */
991 assert_param(IS_ADC_SMPEN(SmpEn));
992 assert_param(IS_FUNCTIONAL_STATE(NewState));
993
994 if (NewState != DISABLE)
995 {
996 ADC->CR2 |= SmpEn;
997 }
998 else
999 {
1000 ADC->CR2 &= ~SmpEn;
1001 }
1002 }
1003
1004 /**
1005 * @brief The hold enable bit of the sample-hold circuit.
1006 * @param SmpEn:
1007 * @arg ADC_IOSH1_AMPEN
1008 * @arg ADC_IOSH2_AMPEN
1009 * @param NewState: new state of AMP.
1010 * This parameter can be: ENABLE or DISABLE.
1011 * @note None
1012 * @retval None
1013 */
ADC_IoshAmpCmd(uint32_t AmpEn,FunctionalState NewState)1014 void ADC_IoshAmpCmd(uint32_t AmpEn, FunctionalState NewState)
1015 {
1016 /* Check the parameters */
1017 assert_param(IS_ADC_AMPEN(AmpEn));
1018 assert_param(IS_FUNCTIONAL_STATE(NewState));
1019
1020 if (NewState != DISABLE)
1021 {
1022 ADC->CR2 |= AmpEn;
1023 }
1024 else
1025 {
1026 ADC->CR2 &= ~AmpEn;
1027 }
1028 }
1029
1030 /**
1031 * @brief Input source selection.
1032 * @param Ioshx:
1033 * @arg ADC_CR2_IOSH1_SEL
1034 * @arg ADC_CR2_IOSH2_SEL
1035 * @param SmpSel:
1036 * if Ioshx is ADC_CR2_IOSH1_SEL,the SmpSel can be
1037 * @arg ADC_IOSH1_SMPSEL_PB1
1038 * @arg ADC_IOSH1_SMPSEL_OP1OUT
1039 * if Ioshx is ADC_CR2_IOSH2_SEL,the SmpSel can be
1040 * @arg ADC_IOSH2_SMPSEL_PB0
1041 * @arg ADC_IOSH2_SMPSEL_OP2OUT
1042 * @note None
1043 * @retval None
1044 */
1045 #if defined (FT32F072xB)
ADC_IoshSmpSel(uint32_t Ioshx,uint32_t SmpSel)1046 void ADC_IoshSmpSel(uint32_t Ioshx, uint32_t SmpSel)
1047 {
1048 uint32_t tmpreg = 0;
1049
1050 /* Check the parameters */
1051 assert_param(IS_ADC_IOSH(Ioshx));
1052 assert_param(IS_ADC_SMPSEL(SmpSel));
1053
1054 /* Read CR2 register */
1055 tmpreg = ADC->CR2;
1056
1057 if (Ioshx != ADC_CR2_IOSH1_SEL)
1058 {
1059 /* IOSH2 */
1060 tmpreg &= ~ADC_CR2_IOSH2_SEL;
1061 }
1062 else
1063 {
1064 /* IOSH1 */
1065 tmpreg &= ~ADC_CR2_IOSH1_SEL;
1066 }
1067
1068 tmpreg |= SmpSel;
1069
1070 /* Config CR2 register */
1071 ADC->CR2 = tmpreg;
1072 }
1073 /**
1074 * @brief The hold enable bit of the sample-hold circuit.
1075 * @param SmpModBit:
1076 * @arg ADC_CR2_IOSH1_SMPMOD
1077 * @arg ADC_CR2_IOSH2_SMPMOD
1078 * @param Mode:
1079 * @arg ADC_SMP_SOFTWARE_MODE
1080 * @arg ADC_SMP_HARDWARE_MODE
1081 * @note None
1082 * @retval None
1083 */
ADC_IoshSmpMod(uint32_t SmpModBit,uint32_t Mode)1084 void ADC_IoshSmpMod(uint32_t SmpModBit, uint32_t Mode)
1085 {
1086 uint32_t tmpreg = 0;
1087
1088 /* Check the parameters */
1089 assert_param(IS_ADC_SMPMOD(SmpModBit));
1090 assert_param(IS_ADC_MODE(Mode));
1091
1092 /* Read CR2 register */
1093 tmpreg = ADC->CR2;
1094
1095 if (Mode != ADC_SMP_SOFTWARE_MODE)
1096 {
1097 /* Hardware mode */
1098 if (SmpModBit != ADC_CR2_IOSH1_SMPMOD)
1099 {
1100 /* IOSH2 */
1101 tmpreg |= ADC_CR2_IOSH2_SMPMOD | ADC_CR2_IOSH2_AMPEN;
1102 }
1103 else
1104 {
1105 /* IOSH1 */
1106 tmpreg |= ADC_CR2_IOSH1_SMPMOD | ADC_CR2_IOSH1_AMPEN;
1107 }
1108 }
1109 else
1110 {
1111 /* Software mode */
1112 if (SmpModBit != ADC_CR2_IOSH1_SMPMOD)
1113 {
1114 /* IOSH2 */
1115 tmpreg &= ~ADC_CR2_IOSH2_AMPEN;
1116 tmpreg |= ADC_CR2_IOSH2_SMPMOD | ADC_CR2_IOSH2_SMPEN;
1117 }
1118 else
1119 {
1120 /* IOSH1 */
1121 tmpreg &= ~ADC_CR2_IOSH1_AMPEN;
1122 tmpreg |= ADC_CR2_IOSH1_SMPMOD | ADC_CR2_IOSH1_SMPEN;
1123 }
1124 }
1125
1126 /* Config CR2 register */
1127 ADC->CR2 = tmpreg;
1128 }
1129 /**
1130 * @brief External hardware trigger mode config.
1131 * @param NewState: new state of .
1132 * This parameter can be: ENABLE or DISABLE.
1133 * @note None
1134 * @retval None
1135 */
ADC_ExtModeCmd(FunctionalState NewState)1136 void ADC_ExtModeCmd(FunctionalState NewState)
1137 {
1138 /* Check the parameters */
1139 assert_param(IS_FUNCTIONAL_STATE(NewState));
1140
1141 if (NewState != DISABLE)
1142 {
1143 ADC1->ETCR |= ADC_ETCR_EXTMOD;
1144 }
1145 else
1146 {
1147 ADC1->ETCR &= ~ADC_ETCR_EXTMOD;
1148 }
1149 }
1150
1151 /**
1152 * @brief Stop sampling configuration after triggering.
1153 * @param NewState: new state of .
1154 * This parameter can be: ENABLE or DISABLE.
1155 * @note None
1156 * @retval None
1157 */
ADC_TrgdDisSmpCmd(FunctionalState NewState)1158 void ADC_TrgdDisSmpCmd(FunctionalState NewState)
1159 {
1160 /* Check the parameters */
1161 assert_param(IS_FUNCTIONAL_STATE(NewState));
1162
1163 if (NewState != DISABLE)
1164 {
1165 ADC1->ETCR |= ADC_ETCR_TRGDISSMP;
1166 }
1167 else
1168 {
1169 ADC1->ETCR &= ~ADC_ETCR_TRGDISSMP;
1170 }
1171 }
1172 /**
1173 * @brief The delay time of The external hardware triggers.
1174 * @param ExtDly: 0~1023.
1175 * @note None
1176 * @retval None
1177 */
ADC_ExtDlyConfig(uint32_t ExtDly)1178 void ADC_ExtDlyConfig(uint32_t ExtDly)
1179 {
1180 uint32_t tmpreg = 0;
1181
1182 /* Check the parameters */
1183 assert_param(IS_ADC_EXTDLY(ExtDly));
1184
1185 /* Read ETCR register */
1186 tmpreg = ADC1->ETCR;
1187
1188 /* Clear EXTDLY */
1189 tmpreg &= ~ADC_ETCR_EXTDLY;
1190
1191 /* Config EXTDLY */
1192 tmpreg |= ExtDly;
1193
1194 /* Config ETCR */
1195 ADC1->ETCR = tmpreg;
1196 }
1197
1198 /**
1199 * @brief Rising edge triggering config.
1200 * @param Rtenx:This parameter can be :
1201 * ADC_RTENR_RTEN or ADC_RTENR_RTEN_0 ~ ADC_RTENR_RTEN_18
1202 * @param NewState: new state of .
1203 * This parameter can be: ENABLE or DISABLE.
1204 * @note None
1205 * @retval None
1206 */
ADC_RtenCmd(uint32_t Rtenx,FunctionalState NewState)1207 void ADC_RtenCmd(uint32_t Rtenx, FunctionalState NewState)
1208 {
1209 /* Check the parameters */
1210 assert_param(IS_ADC_RTEN(Rtenx));
1211 assert_param(IS_FUNCTIONAL_STATE(NewState));
1212
1213 if (NewState != DISABLE)
1214 {
1215 ADC1->RTENR |= Rtenx;
1216 }
1217 else
1218 {
1219 ADC1->RTENR &= ~Rtenx;
1220 }
1221 }
1222
1223 /**
1224 * @brief Falling edge triggering config.
1225 * @param Ftenx:This parameter can be :
1226 * ADC_FTENR_RTEN or ADC_FTENR_RTEN_0 ~ ADC_FTENR_RTEN_18
1227 * @param NewState: new state of .
1228 * This parameter can be: ENABLE or DISABLE.
1229 * @note None
1230 * @retval None
1231 */
ADC_FtenCmd(uint32_t Ftenx,FunctionalState NewState)1232 void ADC_FtenCmd(uint32_t Ftenx, FunctionalState NewState)
1233 {
1234 /* Check the parameters */
1235 assert_param(IS_ADC_FTEN(Ftenx));
1236 assert_param(IS_FUNCTIONAL_STATE(NewState));
1237
1238 if (NewState != DISABLE)
1239 {
1240 ADC1->FTENR |= Ftenx;
1241 }
1242 else
1243 {
1244 ADC1->FTENR &= ~Ftenx;
1245 }
1246 }
1247
1248 #endif
1249 /**
1250 * @}
1251 */
1252
1253 /**
1254 * @}
1255 */
1256
1257 /**
1258 * @}
1259 */
1260
1261 /**
1262 * @}
1263 */
1264
1265 /************************ (C) COPYRIGHT FMD *****END OF FILE****/
1266