Home
last modified time | relevance | path

Searched defs:B (Results 1 – 25 of 36) sorted by relevance

12

/bsp/rockchip/common/rk_hal/lib/hal/src/pinctrl/
A Dhal_pinctrl_v2.c135 #define RK_SET_DS_0(B, P, p, v) SET_DS_0(B, P, p % DS_PIN_PER_REG, v, DS_BIT_PER_PIN) argument
136 #define RK_SET_DS_1(B, P, p, v) SET_DS_1(B, P, p % DS_PIN_PER_REG, v, DS_BIT_PER_PIN) argument
157 #define RK_SET_DS_0(B, P, p, v) SET_DS_0(B, P, p % DS_PIN_PER_REG, v, DS_BIT_PER_PIN) argument
158 #define RK_SET_DS_1(B, P, p, v) SET_DS_1(B, P, p % DS_PIN_PER_REG, v, DS_BIT_PER_PIN) argument
159 #define RK_SET_DS_2(B, P, p, v) SET_DS_2(B, P, p % DS_PIN_PER_REG, v, DS_BIT_PER_PIN) argument
190 #define RK_SET_P_0(B, P, p, v) SET_P_0(B, P, p % P_PIN_PER_REG, v, P_BIT_PER_PIN) argument
191 #define RK_SET_P_1(B, P, p, v) SET_P_1(B, P, p % P_PIN_PER_REG, v, P_BIT_PER_PIN) argument
212 #define RK_SET_P_0(B, P, p, v) SET_P_0(B, P, p % P_PIN_PER_REG, v, P_BIT_PER_PIN) argument
213 #define RK_SET_P_1(B, P, p, v) SET_P_1(B, P, p % P_PIN_PER_REG, v, P_BIT_PER_PIN) argument
214 #define RK_SET_P_2(B, P, p, v) SET_P_2(B, P, p % P_PIN_PER_REG, v, P_BIT_PER_PIN) argument
[all …]
/bsp/efm32/EFM32_Gxxx_DK/
A Ddvk.h129 #define DVK_writeRegister(A, B) DVK_EBI_writeRegister(A, B) argument
134 #define DVK_writeRegister(A, B) DVK_SPI_writeRegister(A, B) argument
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/drivers/
A Dfsl_cau3.c2299 const uint8_t *B, in cau3_pkha_init_data()
2489 const uint8_t *B, in cau3_pkha_modmul()
2624 uint8_t *B, in CAU3_PKHA_NormalToMontgomery()
2701 uint8_t *B, in CAU3_PKHA_MontgomeryToNormal()
2756 const uint8_t *B, in CAU3_PKHA_ModAdd()
2817 const uint8_t *B, in CAU3_PKHA_ModSub1()
2873 const uint8_t *B, in CAU3_PKHA_ModSub2()
2919 const uint8_t *B, in CAU3_PKHA_ModMul()
3269 const uint8_t *B, in CAU3_PKHA_PrimalityTest()
3310 const cau3_pkha_ecc_point_t *B, in CAU3_PKHA_ECC_PointAdd()
[all …]
/bsp/simulator/SDL2/include/
A DSDL_timer.h108 #define SDL_TICKS_PASSED(A, B) ((Sint32)((B) - (A)) <= 0) argument
A DSDL_pixels.h120 #define SDL_DEFINE_PIXELFOURCC(A, B, C, D) SDL_FOURCC(A, B, C, D) argument
A DSDL_stdinc.h169 #define SDL_FOURCC(A, B, C, D) \ argument
/bsp/stm32/stm32f407-rt-spark/board/ports/led_matrix/
A Ddrv_matrix_led.h9 uint8_t B; member
/bsp/apollo2/libraries/drivers/hal/
A Dam_hal_wdt.c64 #define adjacent(A, B) (((A) == (B)) || (((A) + 1) == (B)) || ((B) == 0)) argument
A Dam_hal_ctimer.c72 #define adjacent(A, B) (((A) == (B)) || (((A) + 1) == (B)) || ((B) == 0)) argument
/bsp/tae32f5300/Libraries/CMSIS/Include/
A Darm_vec_math.h132 f32x4_t B = vfmasq(vdupq_n_f32(coeffs[6]), x, coeffs[2]); in vtaylor_polyq_f32() local
/bsp/nxp/imx/imxrt/libraries/drivers/vglite/VGLite/
A Dvg_lite_flat.c159 const vg_lite_float_t B = 0.39; in approx_inverse_integral() local
A Dvg_lite.c145 #define B(color) ((color) & 0xff) macro
/bsp/ht32/libraries/HT32_STD_5xxxx_FWLib/library/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra8m1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra8d1-vision-board/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ebf_qi_min_6m5/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra4e2-eco/ra/arm/CMSIS_6/CMSIS/Core/Include/
A Dcore_cm52.h418 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
A Dcore_cm85.h413 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra4m2-eco/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra6e2-fpb/ra/arm/CMSIS_6/CMSIS/Core/Include/
A Dcore_cm52.h418 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra6m3-hmi-board/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/at32/libraries/CMSIS/include/
A Dcore_cm85.h415 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/airm2m/air32f103/libraries/CMSIS/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/renesas/ra8d1-ek/ra/arm/CMSIS_5/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member
/bsp/ht32/libraries/HT32_STD_1xxxx_FWLib/library/CMSIS/Core/Include/
A Dcore_cm85.h391 uint32_t B:1; /*!< bit: 21 BTI active (read 0) */ member

Completed in 309 milliseconds

12