1 /** 2 **************************************************************************************** 3 * 4 * @file co_bt_defines.h 5 * 6 * @brief This file contains the common Bluetooth defines, enumerations and structures 7 * definitions for use by all modules in RW stack. 8 * 9 * Copyright (C) RivieraWaves 2009-2016 10 * 11 * 12 **************************************************************************************** 13 */ 14 15 #ifndef CO_BT_DEFINES_H_ 16 #define CO_BT_DEFINES_H_ 17 18 19 /** 20 **************************************************************************************** 21 * @addtogroup CO_BT_DEFINES Common Bluetooth defines 22 * @ingroup CO_BT 23 * @brief Common Bluetooth definitions and structures. 24 * 25 * @{ 26 **************************************************************************************** 27 */ 28 29 30 /* 31 * DEFINES 32 **************************************************************************************** 33 */ 34 35 /** 36 * BD Address format (values in bytes) 37 * | 3B | 1B | 2B | 38 * | LAP | UAP | NAP | 39 */ 40 #define BD_ADDR_LEN 6 41 #define BD_ADDR_LAP_POS 0 42 #define BD_ADDR_LAP_LEN 3 43 #define BD_ADDR_UAP_POS BD_ADDR_LAP_LEN 44 #define BD_ADDR_UAP_LEN 1 45 #define BD_ADDR_NAP_POS BD_ADDR_UAP_LEN 46 #define BD_ADDR_NAP_LEN 2 47 48 ///Length of fields in Bluetooth messages, in number of bytes 49 #define EVT_MASK_LEN 8 50 #define DEV_CLASS_LEN 3 51 #define ACO_LEN 12 52 #define SRES_LEN 0x04 53 #define ACCESS_ADDR_LEN 0x04 54 #define LE_PASSKEY_LEN 0x04 55 #define BD_NAME_SIZE 0x20//0xF8 // Was 0x20 for BLE HL 56 #define ADV_DATA_LEN 0x1F 57 #define BLE_DATA_LEN 0x1B 58 #define SCAN_RSP_DATA_LEN 0x1F 59 #define LE_CHNL_MAP_LEN 0x05 60 #define CHNL_MAP_LEN 0x0A 61 #define KEY_LEN 0x10 62 #define PIN_CODE_MIN_LEN 0x01 63 #define PIN_CODE_MAX_LEN 0x10 64 #define PRIV_KEY_192_LEN 24 65 #define PUB_KEY_192_LEN 48 66 #define PRIV_KEY_256_LEN 32 67 #define PUB_KEY_256_LEN 64 68 #define CFM_LEN 0x10 69 #define ENC_DATA_LEN 0x10 70 #define RAND_VAL_LEN 0x10 71 #define RAND_NB_LEN 0x08 72 #define LE_FEATS_LEN 0x08 73 #define SUPP_CMDS_LEN 0x40 74 #define FEATS_LEN 0x08 75 #define NAME_VECT_SIZE 14 76 #define LMP_FEATS_LEN 0x08 77 #define LE_STATES_LEN 0x08 78 #define WHITE_LIST_LEN 0x0A 79 #define LE_FREQ_LEN 0x28 80 #define LE_DATA_FREQ_LEN 0x25 81 #define CRC_INIT_LEN 0x03 82 #define SESS_KEY_DIV_LEN 0x08 83 #define INIT_VECT_LEN 0x04 84 #define MIC_LEN 0x04 85 #define IV_LEN 0x08 86 87 // BT 4.2 - Secure Connections 88 #define PUBLIC_KEY_P256_LEN 0x20 89 #define DHKEY_CHECK_LEN 0x10 90 91 #define DH_KEY_LEN 0x20 92 93 /// Maximum maskable event code 94 #define EVT_MASK_CODE_MAX EVT_MASK_LEN * 8 95 96 /// Format of the Advertising packets 97 #define ADV_ADDR_OFFSET 0 98 #define ADV_ADDR_LEN BD_ADDR_LEN 99 #define ADV_DATA_OFFSET (ADV_ADDR_OFFSET + ADV_ADDR_LEN) 100 101 /// BLE supported features 102 //byte 0 103 #define BLE_ENC_FEATURE 0x01 104 #define BLE_CON_PARAM_REQ_PROC_FEATURE 0x02 105 #define BLE_REJ_IND_EXT_FEATURE 0x04 106 #define BLE_SLAVE_INIT_EXCHG_FEATURE 0x08 107 #define BLE_PING_FEATURE 0x10 108 #define BLE_LENGTH_EXT_FEATURE 0x20 109 #define BLE_LL_PRIVACY_FEATURE 0x40 110 #define BLE_EXT_SCAN_POLICY_FEATURE 0x80 111 112 /// BLE supported states 113 //byte 0 114 #define BLE_NON_CON_ADV_STATE 0x01 115 #define BLE_DISC_ADV_STATE 0x02 116 #define BLE_CON_ADV_STATE 0x04 117 #define BLE_HDC_DIRECT_ADV_STATE 0x08 118 #define BLE_PASS_SCAN_STATE 0x10 119 #define BLE_ACTIV_SCAN_STATE 0x20 120 #define BLE_INIT_MASTER_STATE 0x40 121 #define BLE_CON_SLAVE_STATE 0x80 122 123 //byte 1 124 #define BLE_NON_CON_ADV_PASS_SCAN_STATE 0x01 125 #define BLE_DISC_ADV_PASS_SCAN_STATE 0x02 126 #define BLE_CON_ADV_PASS_SCAN_STATE 0x04 127 #define BLE_HDC_DIRECT_ADV_PASS_SCAN_STATE 0x08 128 #define BLE_NON_CON_ADV_ACTIV_SCAN_STATE 0x10 129 #define BLE_DISC_ADV_ACTIV_SCAN_STATE 0x20 130 #define BLE_CON_ADV_ACTIV_SCAN_STATE 0x40 131 #define BLE_HDC_DIRECT_ADV_ACTIV_SCAN_STATE 0x80 132 133 //byte 2 134 #define BLE_NON_CON_ADV_INIT_STATE 0x01 135 #define BLE_DISC_ADV_INIT_STATE 0x02 136 #define BLE_NON_CON_ADV_MASTER_STATE 0x04 137 #define BLE_DISC_ADV_MASTER_STATE 0x08 138 #define BLE_NON_CON_ADV_SLAVE_STATE 0x10 139 #define BLE_DISC_ADV_SLAVE_STATE 0x20 140 #define BLE_PASS_SCAN_INIT_STATE 0x40 141 #define BLE_ACTIV_SCAN_INIT_STATE 0x80 142 143 //byte 3 144 #define BLE_PASS_SCAN_MASTER_STATE 0x01 145 #define BLE_ACTIV_SCAN_MASTER_STATE 0x02 146 #define BLE_PASS_SCAN_SLAVE_STATE 0x04 147 #define BLE_ACTIV_SCAN_SLAVE_STATE 0x08 148 #define BLE_INIT_MASTER_MASTER_STATE 0x10 149 #define BLE_LDC_DIRECT_ADV_STATE 0x20 150 #define BLE_LDC_DIRECT_ADV_PASS_SCAN_STATE 0x40 151 #define BLE_LDC_DIRECT_ADV_ACTIV_SCAN_STATE 0x80 152 153 //byte 4 154 #define BLE_CON_ADV_INIT_MASTER_SLAVE_STATE 0x01 155 #define BLE_HDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE 0x02 156 #define BLE_LDC_DIRECT_ADV_INIT_MASTER_SLAVE_STATE 0x04 157 #define BLE_CON_ADV_MASTER_SLAVE_STATE 0x08 158 #define BLE_HDC_DIRECT_ADV_MASTER_SLAVE_STATE 0x10 159 #define BLE_LDC_DIRECT_ADV_MASTER_SLAVE_STATE 0x20 160 #define BLE_CON_ADV_SLAVE_SLAVE_STATE 0x40 161 #define BLE_HDC_DIRECT_ADV_SLAVE_SLAVE_STATE 0x80 162 163 //byte 5 164 #define BLE_LDC_DIRECT_ADV_SLAVE_SLAVE_STATE 0x01 165 #define BLE_INIT_MASTER_SLAVE_STATE 0x02 166 167 /// BLE supported commands 168 //byte0 169 #define BLE_DISC_CMD 0x20 170 //byte2 171 #define BLE_RD_REM_VERS_CMD 0x80 172 //byte5 173 #define BLE_SET_EVT_MSK_CMD 0x40 174 #define BLE_RESET_CMD 0x80 175 //byte10 176 #define BLE_RD_TX_PWR_CMD 0x04 177 #define BLE_SET_CTRL_TO_HL_FCTRL_CMD 0x20 178 #define BLE_HL_BUF_SIZE_CMD 0x40 179 #define BLE_HL_NB_CMP_PKT_CMD 0x80 180 //byte14 181 #define BLE_RD_LOC_VERS_CMD 0x08 182 #define BLE_RD_LOC_SUP_FEAT_CMD 0x20 183 #define BLE_RD_BUF_SIZE_CMD 0x80 184 //byte15 185 #define BLE_RD_BD_ADDR_CMD 0x02 186 #define BLE_RD_RSSI_CMD 0x20 187 //byte22 188 #define BLE_SET_EVT_MSK_PG2_CMD 0x04 189 //byte25 190 #define BLE_LE_SET_EVT_MSK_CMD 0x01 191 #define BLE_LE_RD_BUF_SIZE_CMD 0x02 192 #define BLE_LE_RD_LOC_SUP_FEAT_CMD 0x04 193 #define BLE_LE_SET_RAND_ADDR_CMD 0x10 194 #define BLE_LE_SET_ADV_PARAM_CMD 0x20 195 #define BLE_LE_RD_ADV_TX_PWR_CMD 0x40 196 #define BLE_LE_SET_ADV_DATA_CMD 0x80 197 //byte26 198 #define BLE_LE_SET_SC_RSP_DATA_CMD 0x01 199 #define BLE_LE_SET_ADV_EN_CMD 0x02 200 #define BLE_LE_SET_SC_PARAM_CMD 0x04 201 #define BLE_LE_SET_SC_EN_CMD 0x08 202 #define BLE_LE_CREAT_CNX_CMD 0x10 203 #define BLE_LE_CREAT_CNX_CNL_CMD 0x20 204 #define BLE_LE_RD_WL_SIZE_CMD 0x40 205 #define BLE_LE_CLEAR_WL_CMD 0x80 206 //byte27 207 #define BLE_LE_ADD_DEV_WL_CMD 0x01 208 #define BLE_LE_REM_DEV_WL_CMD 0x02 209 #define BLE_LE_CNX_UPDATE_CMD 0x04 210 #define BLE_LE_SET_HL_CH_CLASS_CMD 0x08 211 #define BLE_LE_RD_CH_MAP_CMD 0x10 212 #define BLE_LE_RD_REM_USED_FEAT_CMD 0x20 213 #define BLE_LE_ENCRYPT_CMD 0x40 214 #define BLE_LE_RAND_CMD 0x80 215 //byte28 216 #define BLE_LE_START_ENC_CMD 0x01 217 #define BLE_LE_LTK_REQ_RPLY_CMD 0x02 218 #define BLE_LE_LTK_REQ_NEG_RPLY_CMD 0x04 219 #define BLE_LE_RD_SUPP_STATES_CMD 0x08 220 #define BLE_LE_RX_TEST_CMD 0x10 221 #define BLE_LE_TX_TEST_CMD 0x20 222 #define BLE_LE_STOP_TEST_CMD 0x40 223 224 //byte32 225 #define BLE_RD_AUTH_PAYL_TO_CMD 0x10 226 #define BLE_WR_AUTH_PAYL_TO_CMD 0x20 227 228 229 //byte33 230 #define BLE_LE_REM_CON_PARA_REQ_RPLY_CMD 0x10 231 #define BLE_LE_REM_CON_PARA_REQ_NEG_RPLY_CMD 0x20 232 #define BLE_LE_SET_DATA_LEN_CMD 0x40 233 #define BLE_LE_RD_SUGGTED_DFT_DATA_LEN_CMD 0x80 234 235 //byte34 236 #define BLE_LE_WR_SUGGTED_DFT_DATA_LEN_CMD 0x01 237 #define BLE_LE_RD_LOC_P256_PUB_KEY_CMD 0x02 238 #define BLE_LE_GEN_DH_KEY_CMD 0x04 239 #define BLE_LE_ADD_DEV_TO_RESOLV_LIST_CMD 0x08 240 #define BLE_LE_REM_DEV_FROM_RESOLV_LIST_CMD 0x10 241 #define BLE_LE_CLEAR_RESOLV_LIST_CMD 0x20 242 #define BLE_LE_RD_RESOLV_LIST_SIZE_CMD 0x40 243 #define BLE_LE_RD_PEER_RESOLV_ADDR_CMD 0x80 244 245 //byte35 246 #define BLE_LE_RD_LOCAL_RESOLV_ADDR_CMD 0x01 247 #define BLE_LE_SET_ADDR_RESOL_CMD 0x02 248 #define BLE_LE_SET_RESOLV_PRIV_ADDR_TO_CMD 0x04 249 #define BLE_LE_RD_MAX_DATA_LEN_CMD 0x08 250 251 // Inquiry Length HCI:7.1.1 252 #define INQ_LEN_MIN 0x01 253 #define INQ_LEN_MAX 0x30 254 255 // Inquiry Length HCI:7.1.3 256 #define INQ_MIN_PER_LEN_MIN 0x0002 257 #define INQ_MIN_PER_LEN_MAX 0xFFFE 258 #define INQ_MAX_PER_LEN_MIN 0x0003 259 #define INQ_MAX_PER_LEN_MAX 0xFFFF 260 261 // IAC support 262 #define NB_IAC_MIN 0x01 263 #define NB_IAC_MAX 0x40 264 265 /// Maximum value of a Bluetooth clock (in 625us slots) 266 #define MAX_SLOT_CLOCK ((1L<<27) - 1) 267 268 269 /// Logical Transport Adresses BB:4.2 270 #define LT_ADDR_BCST 0x00 271 #define LT_ADDR_MIN 0x01 272 #define LT_ADDR_MAX 0x07 273 274 /// Link type HCI:7.7.3 275 #define SCO_TYPE 0 276 #define ACL_TYPE 1 277 #define ESCO_TYPE 2 278 #define UNKNOWN_TYPE 3 // Used in LM 279 #define LE_TYPE 4 280 281 282 /// Allow Role Switch HCI:4.6.8 283 #define MASTER_ROLE 0 284 #define SLAVE_ROLE 1 285 #define UNKNOWN_ROLE 0xFF //Used in LC to init the links role 286 287 /// Link policy HCI:4.6.9 and HCI:4.6.10 288 #define POLICY_SWITCH 0x0001 289 #define POLICY_HOLD 0x0002 290 #define POLICY_SNIFF 0x0004 291 #define POLICY_PARK 0x0008 292 293 /// Allow Role Switch HCI:4.5.5 294 #define ROLE_SWITCH_NOT_ALLOWED 0 295 #define ROLE_SWITCH_ALLOWED 1 296 297 /// AcceptConnection Role HCI:4.5.8 298 #define ACCEPT_SWITCH_TO_MASTER 0 299 #define ACCEPT_REMAIN_SLAVE 1 300 301 /// Packet Type Flags HCI:7.1.14 302 #define PACKET_TYPE_EDR_MSK 0x330E 303 #define PACKET_TYPE_GFSK_MSK 0xCCF8 304 #define PACKET_TYPE_NO_2_DH1_FLAG 0x0002 305 #define PACKET_TYPE_NO_3_DH1_FLAG 0x0004 306 #define PACKET_TYPE_DM1_FLAG 0x0008 307 #define PACKET_TYPE_DH1_FLAG 0x0010 308 #define PACKET_TYPE_HV1_FLAG 0x0020 309 #define PACKET_TYPE_HV2_FLAG 0x0040 310 #define PACKET_TYPE_HV3_FLAG 0x0080 311 #define PACKET_TYPE_NO_2_DH3_FLAG 0x0100 312 #define PACKET_TYPE_NO_3_DH3_FLAG 0x0200 313 #define PACKET_TYPE_DM3_FLAG 0x0400 314 #define PACKET_TYPE_DH3_FLAG 0x0800 315 #define PACKET_TYPE_NO_2_DH5_FLAG 0x1000 316 #define PACKET_TYPE_NO_3_DH5_FLAG 0x2000 317 #define PACKET_TYPE_DM5_FLAG 0x4000 318 #define PACKET_TYPE_DH5_FLAG 0x8000 319 320 /// Synchronous Packet Types HCI:7.1.14 321 #define SYNC_PACKET_TYPE_HV1_FLAG 0x0001 322 #define SYNC_PACKET_TYPE_HV2_FLAG 0x0002 323 #define SYNC_PACKET_TYPE_HV3_FLAG 0x0004 324 #define SYNC_PACKET_TYPE_EV3_FLAG 0x0008 325 #define SYNC_PACKET_TYPE_EV4_FLAG 0x0010 326 #define SYNC_PACKET_TYPE_EV5_FLAG 0x0020 327 328 #define SYNC_PACKET_TYPE_NO_EV3_2_FLAG 0x0040 329 #define SYNC_PACKET_TYPE_NO_EV3_3_FLAG 0x0080 330 #define SYNC_PACKET_TYPE_NO_EV5_2_FLAG 0x0100 331 #define SYNC_PACKET_TYPE_NO_EV5_3_FLAG 0x0200 332 333 #define SYNC_PACKET_TYPE_EV3_2_FLAG 0x0040 334 #define SYNC_PACKET_TYPE_EV3_3_FLAG 0x0080 335 #define SYNC_PACKET_TYPE_EV5_2_FLAG 0x0100 336 #define SYNC_PACKET_TYPE_EV5_3_FLAG 0x0200 337 338 /// RWBT 1.2 339 #define SYNC_EV3_PACKET_SIZE 30 340 #define SYNC_EV4_PACKET_SIZE 120 341 #define SYNC_EV5_PACKET_SIZE 180 342 343 /// Packet Boundary Flag HCI:5.4.2 344 #define PBF_1ST_NF_HL_FRAG 0x00 // Non-flushable packets 345 #define PBF_CONT_HL_FRAG 0x01 346 #define PBF_1ST_HL_FRAG 0x02 347 #define PBF_CMP_PDU 0x03 348 #define PBF_MASK 0x03 349 350 /// Broadcast Flag HCI:5.4.2 351 #define BCF_P2P 0x00 352 #define BCF_ACTIVE_SLV_BCST 0x04 353 #define BCF_PARK_SLV_BCST 0x08 354 #define BCF_MASK 0x0C 355 356 /// Synchronous Packet Status Flag HCI:5.4.3 357 #define CORRECTLY_RX_FLAG 0x00 358 #define POSSIBLY_INVALID_FLAG 0x01 359 #define NO_RX_DATA_FLAG 0x02 360 #define PARTIALLY_LOST_FLAG 0x03 361 362 /// Park mode defines LMP:3.17 363 #define MACCESS_MSK 0x0F 364 #define ACCSCHEM_MSK 0xF0 365 366 /// Support 3 feature pages 367 #define FEATURE_PAGE_MAX 3 368 369 #define FEATURE_PAGE_0 0 370 #define FEATURE_PAGE_1 1 371 #define FEATURE_PAGE_2 2 372 373 /// Feature mask definition LMP:3.3 374 #define B0_3_SLOT_POS 0 375 #define B0_3_SLOT_MSK 0x01 376 #define B0_5_SLOT_POS 1 377 #define B0_5_SLOT_MSK 0x02 378 #define B0_ENC_POS 2 379 #define B0_ENC_MSK 0x04 380 #define B0_SLOT_OFF_POS 3 381 #define B0_SLOT_OFF_MSK 0x08 382 #define B0_TIMING_ACCU_POS 4 383 #define B0_TIMING_ACCU_MSK 0x10 384 #define B0_ROLE_SWITCH_POS 5 385 #define B0_ROLE_SWITCH_MSK 0x20 386 #define B0_HOLD_MODE_POS 6 387 #define B0_HOLD_MODE_MSK 0x40 388 #define B0_SNIFF_MODE_POS 7 389 #define B0_SNIFF_MODE_MSK 0x80 390 391 #define B1_PARK_POS 0 392 #define B1_PARK_MSK 0x01 393 #define B1_RSSI_POS 1 394 #define B1_RSSI_MSK 0x02 395 #define B1_CQDDR_POS 2 396 #define B1_CQDDR_MSK 0x04 397 #define B1_SCO_POS 3 398 #define B1_SCO_MSK 0x08 399 #define B1_HV2_POS 4 400 #define B1_HV2_MSK 0x10 401 #define B1_HV3_POS 5 402 #define B1_HV3_MSK 0x20 403 #define B1_MULAW_POS 6 404 #define B1_MULAW_MSK 0x40 405 #define B1_ALAW_POS 7 406 #define B1_ALAW_MSK 0x80 407 408 #define B2_CVSD_POS 0 409 #define B2_CVSD_MSK 0x01 410 #define B2_PAGING_PAR_NEGO_POS 1 411 #define B2_PAGING_PAR_NEGO_MSK 0x02 412 #define B2_PWR_CTRL_POS 2 413 #define B2_PWR_CTRL_MSK 0x04 414 #define B2_TRANSPARENT_SCO_POS 3 415 #define B2_TRANSPARENT_SCO_MSK 0x08 416 #define B2_FLOW_CTRL_LAG_POS 4 417 #define B2_FLOW_CTRL_LAG_MSK 0x70 418 #define B2_BCAST_ENC_POS 7 419 #define B2_BCAST_ENC_MSK 0x80 420 421 #define B3_EDR_2MBPS_ACL_POS 1 422 #define B3_EDR_2MBPS_ACL_MSK 0x02 423 #define B3_EDR_3MBPS_ACL_POS 2 424 #define B3_EDR_3MBPS_ACL_MSK 0x04 425 #define B3_ENH_INQSCAN_POS 3 426 #define B3_ENH_INQSCAN_MSK 0x08 427 #define B3_INT_INQSCAN_POS 4 428 #define B3_INT_INQSCAN_MSK 0x10 429 #define B3_INT_PAGESCAN_POS 5 430 #define B3_INT_PAGESCAN_MSK 0x20 431 #define B3_RSSI_INQ_RES_POS 6 432 #define B3_RSSI_INQ_RES_MSK 0x40 433 #define B3_ESCO_EV3_POS 7 434 #define B3_ESCO_EV3_MSK 0x80 435 436 #define B4_EV4_PKT_POS 0 437 #define B4_EV4_PKT_MSK 0x01 438 #define B4_EV5_PKT_POS 1 439 #define B4_EV5_PKT_MSK 0x02 440 #define B4_AFH_CAP_SLV_POS 3 441 #define B4_AFH_CAP_SLV_MSK 0x08 442 #define B4_AFH_CLASS_SLV_POS 4 443 #define B4_AFH_CLASS_SLV_MSK 0x10 444 #define B4_BR_EDR_NOT_SUPP_POS 5 445 #define B4_BR_EDR_NOT_SUPP_MSK 0x20 446 #define B4_LE_SUPP_POS 6 447 #define B4_LE_SUPP_MSK 0x40 448 #define B4_3_SLOT_EDR_ACL_POS 7 449 #define B4_3_SLOT_EDR_ACL_MSK 0x80 450 451 #define B5_5_SLOT_EDR_ACL_POS 0 452 #define B5_5_SLOT_EDR_ACL_MSK 0x01 453 #define B5_SSR_POS 1 454 #define B5_SSR_MSK 0x02 455 #define B5_PAUSE_ENC_POS 2 456 #define B5_PAUSE_ENC_MSK 0x04 457 #define B5_AFH_CAP_MST_POS 3 458 #define B5_AFH_CAP_MST_MSK 0x08 459 #define B5_AFH_CLASS_MST_POS 4 460 #define B5_AFH_CLASS_MST_MSK 0x10 461 #define B5_EDR_ESCO_2MBPS_POS 5 462 #define B5_EDR_ESCO_2MBPS_MSK 0x20 463 #define B5_EDR_ESCO_3MBPS_POS 6 464 #define B5_EDR_ESCO_3MBPS_MSK 0x40 465 #define B5_3_SLOT_EDR_ESCO_POS 7 466 #define B5_3_SLOT_EDR_ESCO_MSK 0x80 467 468 #define B6_EIR_POS 0 469 #define B6_EIR_MSK 0x01 470 #define B6_SIM_LE_BREDR_DEV_CAP_POS 1 471 #define B6_SIM_LE_BREDR_DEV_CAP_MSK 0x02 472 #define B6_SSP_POS 3 473 #define B6_SSP_MSK 0x08 474 #define B6_ENCAPS_PDU_POS 4 475 #define B6_ENCAPS_PDU_MSK 0x10 476 #define B6_ERR_DATA_REP_POS 5 477 #define B6_ERR_DATA_REP_MSK 0x20 478 #define B6_NONFLUSH_PBF_POS 6 479 #define B6_NONFLUSH_PBF_MSK 0x40 480 481 #define B7_LST_CHANGE_EVT_POS 0 482 #define B7_LST_CHANGE_EVT_MSK 0x01 483 #define B7_INQRES_TXPOW_POS 1 484 #define B7_INQRES_TXPOW_MSK 0x02 485 #define B7_ENH_PWR_CTRL_POS 2 486 #define B7_ENH_PWR_CTRL_MSK 0x04 487 #define B7_EXT_FEATS_POS 7 488 #define B7_EXT_FEATS_MSK 0x80 489 490 /// Extended feature mask definition page 1 LMP:3.3 491 #define B0_HOST_SSP_POS 0 492 #define B0_HOST_SSP_MSK 0x01 493 #define B0_HOST_LE_POS 1 494 #define B0_HOST_LE_MSK 0x02 495 #define B0_HOST_LE_BR_EDR_POS 2 496 #define B0_HOST_LE_BR_EDR_MSK 0x04 497 #define B0_HOST_SECURE_CON_POS 3 498 #define B0_HOST_SECURE_CON_MSK 0x08 499 500 /// Extended feature mask definition page 2 LMP:3.3 501 #define B0_CSB_MASTER_POS 0 502 #define B0_CSB_MASTER_MSK 0x01 503 #define B0_CSB_SLAVE_POS 1 504 #define B0_CSB_SLAVE_MSK 0x02 505 #define B0_SYNC_TRAIN_POS 2 506 #define B0_SYNC_TRAIN_MSK 0x04 507 #define B0_SYNC_SCAN_POS 3 508 #define B0_SYNC_SCAN_MSK 0x08 509 #define B0_INQ_RES_NOTIF_EVT_POS 4 510 #define B0_INQ_RES_NOTIF_EVT_MSK 0x10 511 #define B0_GEN_INTERL_SCAN_POS 5 512 #define B0_GEN_INTERL_SCAN_MSK 0x20 513 #define B0_COARSE_CLK_ADJ_POS 6 514 #define B0_COARSE_CLK_ADJ_MSK 0x40 515 516 #define B1_SEC_CON_CTRL_POS 0 517 #define B1_SEC_CON_CTRL_MSK 0x01 518 #define B1_PING_POS 1 519 #define B1_PING_MSK 0x02 520 #define B1_TRAIN_NUDGING_POS 3 521 #define B1_TRAIN_NUDGING_MSK 0x08 522 523 /// Features definitions 524 #define FEAT_3_SLOT_BIT_POS 0 525 #define FEAT_5_SLOT_BIT_POS 1 526 #define FEAT_ENC_BIT_POS 2 527 #define FEAT_SLOT_OFFSET_BIT_POS 3 528 #define FEAT_TIMING_ACC_BIT_POS 4 529 #define FEAT_SWITCH_BIT_POS 5 530 #define FEAT_HOLD_BIT_POS 6 531 #define FEAT_SNIFF_BIT_POS 7 532 533 #define FEAT_PARK_BIT_POS 8 534 #define FEAT_RSSI_BIT_POS 9 535 #define FEAT_QUALITY_BIT_POS 10 536 #define FEAT_SCO_BIT_POS 11 537 #define FEAT_HV2_BIT_POS 12 538 #define FEAT_HV3_BIT_POS 13 539 #define FEAT_ULAW_BIT_POS 14 540 #define FEAT_ALAW_BIT_POS 15 541 542 #define FEAT_CVSD_BIT_POS 16 543 #define FEAT_PAGING_BIT_POS 17 544 #define FEAT_POWER_BIT_POS 18 545 #define FEAT_TRANSP_SCO_BIT_POS 19 546 #define FEAT_BCAST_ENCRYPT_BIT_POS 23 547 548 #define FEAT_EDR_2MB_BIT_POS 25 549 #define FEAT_EDR_3MB_BIT_POS 26 550 #define FEAT_ENH_INQSCAN_BIT_POS 27 551 #define FEAT_INT_INQSCAN_BIT_POS 28 552 #define FEAT_INT_PAGESCAN_BIT_POS 29 553 #define FEAT_RSSI_INQRES_BIT_POS 30 554 #define FEAT_EV3_BIT_POS 31 555 556 #define FEAT_EV4_BIT_POS 32 557 #define FEAT_EV5_BIT_POS 33 558 #define FEAT_AFH_CAPABLE_S_BIT_POS 35 559 #define FEAT_AFH_CLASS_S_BIT_POS 36 560 #define FEAT_BR_EDR_NO_SUPP_BIT_POS 37 561 #define FEAT_LE_BIT_POS 38 562 #define FEAT_3_SLOT_EDR_BIT_POS 39 563 #define FEAT_5_SLOT_EDR_BIT_POS 40 564 #define FEAT_SNIFF_SUBRAT_BIT_POS 41 565 #define FEAT_PAUSE_ENCRYPT_BIT_POS 42 566 #define FEAT_AFH_CAPABLE_M_BIT_POS 43 567 #define FEAT_AFH_CLASS_M_BIT_POS 44 568 #define FEAT_EDR_ESCO_2MB_BIT_POS 45 569 #define FEAT_EDR_ESCO_3MB_BIT_POS 46 570 #define FEAT_3_SLOT_EDR_ESCO_BIT_POS 47 571 #define FEAT_EIR_BIT_POS 48 572 #define FEAT_LE_BR_EDR_BIT_POS 49 573 #define FEAT_SSP_BIT_POS 51 574 #define FEAT_ENCAP_PDU_BIT_POS 52 575 #define FEAT_ERRO_DATA_REP_BIT_POS 53 576 #define FEAT_NFLUSH_PBF_BIT_POS 54 577 #define FEAT_LSTO_CHG_EVT_BIT_POS 56 578 #define FEAT_INQ_TXPWR_BIT_POS 57 579 #define FEAT_EPC_BIT_POS 58 580 #define FEAT_EXT_FEATS_BIT_POS 63 581 #define FEAT_SSP_HOST_BIT_POS 64 582 #define FEAT_LE_HOST_BIT_POS 65 583 #define FEAT_LE_BR_EDR_HOST_BIT_POS 66 584 #define FEAT_SEC_CON_HOST_BIT_POS 67 585 586 #define FEAT_CSB_MASTER_BIT_POS 128 587 #define FEAT_CSB_SLAVE_BIT_POS 129 588 #define FEAT_SYNC_TRAIN_BIT_POS 130 589 #define FEAT_SYNC_SCAN_BIT_POS 131 590 #define FEAT_INQ_RES_NOTIF_EVT_BIT_POS 132 591 #define FEAT_GEN_INTERL_SCAN_BIT_POS 133 592 #define FEAT_COARSE_CLK_ADJ_BIT_POS 134 593 #define FEAT_SEC_CON_CTRL_BIT_POS 136 594 #define FEAT_PING_BIT_POS 137 595 #define FEAT_TRAIN_NUDGING_BIT_POS 139 596 597 /// Maximum number of feature bits per page (8 bytes x 8 bits) 598 #define MAX_FEAT_BITS_PER_PAGE 64 599 600 /// Poll interval defines LMP:5.2 601 #define POLL_INTERVAL_MIN 0x0006 602 #define POLL_INTERVAL_DFT 0x0028 603 #define POLL_INTERVAL_MAX 0x1000 604 605 /// Power Adjustment Request LMP:5.2 606 #define PWR_ADJ_REQ_DEC_1_STEP 0x00 607 #define PWR_ADJ_REQ_INC_1_STEP 0x01 608 #define PWR_ADJ_REQ_INC_MAX 0x02 609 610 /// Power Adjustment Response LMP:5.2 611 #define PWR_ADJ_RES_GFSK_POS 0 612 #define PWR_ADJ_RES_GFSK_MASK 0x03 613 #define PWR_ADJ_RES_DQPSK_POS 2 614 #define PWR_ADJ_RES_DQPSK_MASK 0x0C 615 #define PWR_ADJ_RES_8DPSK_POS 4 616 #define PWR_ADJ_RES_8DPSK_MASK 0x30 617 618 #define PWR_ADJ_RES_NOT_SUPP 0x00 619 #define PWR_ADJ_RES_CHG_1_STEP 0x01 620 #define PWR_ADJ_RES_MAX 0x02 621 #define PWR_ADJ_RES_MIN 0x03 622 623 /// Nb of Broadcast retransmissions defines 624 #define NB_BROADCAST_DFT 0x01 625 626 /// Nb of Broadcast CLK_ADJ PDU Baseband:4.1.14.1 627 #define NB_BROADCAST_CLK_ADJ 0x06 628 629 /// Min PCA clk_adj_instant (in slots) LMP:4.1.14.1 630 #define PCA_INSTANT_MIN 12 631 632 /// Piconet Clock Adjustment clk_adj_mode LMP:4.1.14.1 633 #define CLK_ADJ_BEFORE_INSTANT 0 634 #define CLK_ADJ_AFTER_INSTANT 1 635 636 637 /// Different packet types BaseBand:6.7 638 /* Packet and buffer sizes. These sizes do not include payload header (except for FHS 639 * packet where there is no payload header) since payload header is written or read by 640 * the RWBT in a different control structure part (TX/RXPHDR) */ 641 #define FHS_PACKET_SIZE 18 642 #define DM1_PACKET_SIZE 17 643 #define DH1_PACKET_SIZE 27 644 #define DH1_2_PACKET_SIZE 54 645 #define DH1_3_PACKET_SIZE 83 646 #define DV_ACL_PACKET_SIZE 9 647 #define DM3_PACKET_SIZE 121 648 #define DH3_PACKET_SIZE 183 649 #define DH3_2_PACKET_SIZE 367 650 #define DH3_3_PACKET_SIZE 552 651 #define DM5_PACKET_SIZE 224 652 #define DH5_PACKET_SIZE 339 653 #define DH5_2_PACKET_SIZE 679 654 #define DH5_3_PACKET_SIZE 1021 655 #define AUX1_PACKET_SIZE 29 656 657 #define HV1_PACKET_SIZE 10 658 #define HV2_PACKET_SIZE 20 659 #define HV3_PACKET_SIZE 30 660 #define EV3_PACKET_SIZE 30 661 #define EV3_2_PACKET_SIZE 60 662 #define EV3_3_PACKET_SIZE 90 663 #define EV4_PACKET_SIZE 120 664 #define EV5_PACKET_SIZE 180 665 #define EV5_2_PACKET_SIZE 360 666 #define EV5_3_PACKET_SIZE 540 667 668 /// SCO Packet coding LMP:5.2 669 #define SCO_PACKET_HV1 0x00 670 #define SCO_PACKET_HV2 0x01 671 #define SCO_PACKET_HV3 0x02 672 673 /// eSCO Packet coding LMP:5.2 674 #define ESCO_PACKET_NULL 0x00 675 #define ESCO_PACKET_EV3 0x07 676 #define ESCO_PACKET_EV4 0x0C 677 #define ESCO_PACKET_EV5 0x0D 678 #define ESCO_PACKET_EV3_2 0x26 679 #define ESCO_PACKET_EV3_3 0x37 680 #define ESCO_PACKET_EV5_2 0x2C 681 #define ESCO_PACKET_EV5_3 0x3D 682 683 /// Max number of HV packet BaseBand:4.4.2.1 684 #define MAX_NB_HV1 1 685 #define MAX_NB_HV2 2 686 #define MAX_NB_HV3 3 687 688 /// Tsco (ScoInterval) BaseBand:4.4.2.1 689 #define TSCO_HV1 2 690 #define TSCO_HV2 4 691 #define TSCO_HV3 6 692 693 /* Inquiry train repetition length , Baseband :Table 10.4 694 * - 256 repetitions if no SCO 695 * - 512 repetitions if 1 SCO 696 * - 768 repetitions if 2 SCO */ 697 #define INQ_TRAIN_LENGTH_NO_SCO 256 698 #define INQ_TRAIN_LENGTH_1_SCO 512 699 #define INQ_TRAIN_LENGTH_2_SCO 768 700 701 /* Counter for train length, Npage (N*16 slots) depends on the slave page scan mode and 702 * the number of active SCO: 703 * | SR mode | no SCO | one SCO | two SCO | 704 * | R0 | >=1 | >=2 | >=3 | 705 * | R1 | >=128 | >=256 | >=384 | 706 * | R2 | >=256 | >=512 | >=768 | */ 707 #define PAGE_TRAIN_LENGTH_R0 1 708 #define PAGE_TRAIN_LENGTH_R1 128 709 #define PAGE_TRAIN_LENGTH_R2 256 710 711 /// Synchronisation defines 712 #define NORMAL_SYNC_POS (64 + 4) // End of Synchro word at bit 68 (64 + 4) 713 #define SLOT_SIZE 625 // A slot is 625 us 714 715 /// Baseband timeout default value, Baseband timers: 1.1 716 #define PAGE_RESP_TO_DEF 8 717 #define INQ_RESP_TO_DEF 128 718 #define NEW_CONNECTION_TO 32 719 720 /// LMP Response Timeout (in sec) 721 #define LMP_RSP_TO 30 722 723 /// Athenticated Payload Timeout (in units of 10 ms) 724 #define AUTH_PAYL_TO_DFT 0x0BB8 // 30 secs 725 #define AUTH_PAYL_TO_MIN 0x0001 726 727 /// Voice mute pattern defines 728 #define MU_LAW_MUTE 0xFF 729 #define ALAW_CVSD_MUTE 0x55 730 #define TRANSP_MUTE 0x00 731 732 /// Air Mode LMP:5.2 733 #define MU_LAW_MODE 0 734 #define A_LAW_MODE 1 735 #define CVSD_MODE 2 736 #define TRANS_MODE 3 737 738 /// eSCO negotiation State LMP:5.2 739 #define ESCO_NEGO_INIT 0 740 #define ESCO_NEGO_LATEST_POSSIBLE 1 741 #define ESCO_NEGO_SLOT_VIOLATION 2 742 #define ESCO_NEGO_LAT_VIOLATION 3 743 #define ESCO_NEGO_UNSUPPORTED 4 744 745 #define SCO_BANDWIDTH 8000 746 #define SYNC_BANDWIDTH_DONT_CARE 0xFFFFFFFF 747 748 #define SYNC_MIN_LATENCY 0x0004 749 #define SYNC_MAX_LATENCY_ESCO_S1 0x0007 750 #define SYNC_MAX_LATENCY_ESCO_S2 0x0007 751 #define SYNC_MAX_LATENCY_ESCO_S3 0x000A 752 #define SYNC_DONT_CARE_LATENCY 0xFFFF 753 754 #define SYNC_NO_RE_TX 0x00 755 #define SYNC_RE_TX_POWER 0x01 756 #define SYNC_RE_TX_QUALITY 0x02 757 #define SYNC_RE_TX_DONT_CARE 0xFF 758 759 /// Timing Control Flags LMP:5.2 760 #define TIM_CHANGE_FLAG 0x01 761 #define INIT2_FLAG 0x02 762 #define ACCESS_WIN_FLAG 0x04 763 764 /// Packet Type Table defines LMP:4.1.11 765 #define PACKET_TABLE_1MBPS 0x00 766 #define PACKET_TABLE_2_3MBPS 0x01 767 768 /// Data Rate defines LMP:5.2 769 #define FEC_RATE_MSK 0x01 770 #define USE_FEC_RATE 0x00 771 #define NO_FEC_RATE 0x01 772 #define PREF_PACK_MSK 0x06 773 #define NO_PREF_PACK_SIZE 0x00 774 #define USE_1_SLOT_PACKET 0x02 775 #define USE_3_SLOT_PACKET 0x04 776 #define USE_5_SLOT_PACKET 0x06 777 #define PREF_EDR_MSK 0x18 778 #define USE_DM1_ONLY 0x00 779 #define USE_2_MBPS_RATE 0x08 780 #define USE_3_MBPS_RATE 0x10 781 #define PREF_PACK_EDR_MSK 0x60 782 #define USE_1_SLOT_EDR_PKT 0x20 783 #define USE_3_SLOT_EDR_PKT 0x40 784 #define USE_5_SLOT_EDR_PKT 0x60 785 786 /// EIR Data Size HCI:6.24 787 #define EIR_DATA_SIZE 240 788 789 /// Voice setting HCI:4.7.29 & 4.7.30 790 #define INPUT_COD_LIN 0x0000 791 #define INPUT_COD_MULAW 0x0100 792 #define INPUT_COD_ALAW 0x0200 793 #define INPUT_COD_MSK 0x0300 794 #define INPUT_COD_OFF 8 795 #define INPUT_DATA_1COMP 0x0000 796 #define INPUT_DATA_2COMP 0x0040 797 #define INPUT_DATA_SMAG 0x0080 798 #define INPUT_DATA_UNSIGNED 0x00C0 799 #define INPUT_DATAFORM_MSK 0x00C0 800 #define INPUT_DATAFORM_OFF 6 801 #define INPUT_SAMP_8BIT 0x0000 802 #define INPUT_SAMP_16BIT 0x0020 803 #define INPUT_SAMPSIZE_MSK 0x0020 804 #define INPUT_SAMPSIZE_OFF 5 805 #define LIN_PCM_BIT_POS_MSK 0x001C 806 #define LIN_PCM_BIT_POS_OFF 2 807 #define AIR_COD_CVSD 0x0000 808 #define AIR_COD_MULAW 0x0001 809 #define AIR_COD_ALAW 0x0002 810 #define AIR_COD_TRANS 0x0003 811 #define AIR_COD_MSK 0x0003 812 #define AIR_COD_OFF 0 813 814 /// ScanEnable HCI:6.1 815 #define BOTH_SCAN_DISABLE 0 816 #define INQUIRY_SCAN_ENABLE 1 817 #define PAGE_SCAN_ENABLE 2 818 #define BOTH_SCAN_ENABLE 3 819 820 /// PageScanInterval HCI:6.8 821 #define PAGE_SCAN_INTV_MIN 0x0012 822 #define PAGE_SCAN_INTV_MAX 0x1000 823 #define PAGE_SCAN_INTV_DFT 0x0800 824 825 /// PageScanWindow HCI:6.9 826 #define PAGE_SCAN_WIN_MIN 0x0011 827 #define PAGE_SCAN_WIN_MAX 0x1000 828 #define PAGE_SCAN_WIN_DFT 0x0012 829 830 /// InquiryScanInterval HCI:6.2 831 #define INQ_SCAN_INTV_MIN 0x0012 832 #define INQ_SCAN_INTV_MAX 0x1000 833 #define INQ_SCAN_INTV_DFT 0x1000 834 835 /// InquiryScanWindow HCI:6.3 836 #define INQ_SCAN_WIN_MIN 0x0011 837 #define INQ_SCAN_WIN_MAX 0x1000 838 #define INQ_SCAN_WIN_DFT 0x0012 839 840 /// General/Unlimited Inquiry Access Code (GIAC) 841 #define GIAC_LAP_0 0x33 842 #define GIAC_LAP_1 0x8B 843 #define GIAC_LAP_2 0x9E 844 845 /// Limited Dedicated Inquiry Access Code (LIAC) 846 #define LIAC_LAP_0 0x00 847 #define LIAC_LAP_1 0x8B 848 #define LIAC_LAP_2 0x9E 849 850 /// Maximum Dedicated Inquiry Access Code (DIAC MAX) 851 #define DIAC_MAX_LAP_0 0x3F 852 #define DIAC_MAX_LAP_1 0x8B 853 #define DIAC_MAX_LAP_2 0x9E 854 855 /// PIN Type HCI:6.13 856 #define VARIABLE_PIN 0 857 #define FIXED_PIN 1 858 859 /// ConnectionAcceptTimeout HCI:6.7 860 #define CON_ACCEPT_TO_MIN 0x00A0 861 #define CON_ACCEPT_TO_MAX 0xB540 862 #define CON_ACCEPT_TO_DFT 0x1FA0 863 864 /// PageTimeout HCI:6.6 865 #define PAGE_TO_MIN 0x0016 866 #define PAGE_TO_MAX 0xFFFF 867 #define PAGE_TO_DFT 0x2000 868 869 /// Clock offset valid flag in clock offset field HCI:7.1.5/7.1.19 870 #define CLK_OFFSET_VALID_FLAG_POS 15 871 #define CLK_OFFSET_VALID_FLAG_MSK 0x8000 872 873 /// AuthenticationEnable HCI:4.7.24 874 #define AUTH_DISABLED 0x00 // Default 875 #define AUTH_ENABLED 0x01 876 877 /// EncryptionMode HCI:4.7.26 878 #define ENC_DISABLED 0x00 // Default 879 #define ENC_PP_ENABLED 0x01 880 #define ENC_PP_BC_ENABLED 0x02 881 882 /// AutomaticFlushTimeout HCI:4.7.32 883 #define AUTO_FLUSH_TIMEOUT_MAX 0x07FF 884 #define AUTO_FLUSH_TIMEOUT_OFF 0x0000 885 #define AUTO_FLUSH_TIMEOUT_DFT AUTO_FLUSH_TIMEOUT_OFF // Default (no automatic flush timeout) 886 887 /// Link Supervision Time Out (in slots) HCI:6.21 888 #define LSTO_OFF 0x0000 889 #define LSTO_MIN 0x0001 890 #define LSTO_DFT 0x7D00 // Default is 20 s 891 #define LSTO_MAX 0xFFFF 892 893 /// PageScanRepetitionMode HCI:4.5.5 894 #define R0 0x00 895 #define R1 0x01 896 #define R2 0x02 897 #define PAGESCAN_REP_DEF R1 // Default 898 899 /// PageScanPeriodMode HCI:4.7.49 900 #define P0 0x00 // Default 901 #define P1 0x01 902 #define P2 0x02 903 904 /// PageScanMode HCI:4.7.51 905 #define MANDATORY_PAGE_SCAN_MODE 0x00 // Default 906 907 #define OPT_PAGE_SCAN_MODE_1 0x01 908 #define OPT_PAGE_SCAN_MODE_2 0x02 909 #define OPT_PAGE_SCAN_MODE_3 0x03 910 911 /// Encryption Enable HCI:4.5.17 912 #define ENCRYPTION_OFF 0x00 913 #define ENCRYPTION_ON 0x01 914 915 /// Country Code HCI:4.8.4 916 #define NORTH_AMERICA_EUROPE 0x00 917 #define FRANCE 0x01 918 #define SPAIN 0x02 919 #define JAPAN 0x03 920 921 /// Loopback mode HCI:7.6.2 922 #define NO_LOOPBACK 0x00 // Default 923 #define LOCAL_LOOPBACK 0x01 924 #define REMOTE_LOOPBACK 0x02 925 926 /// Erroneous Data Reporting HCI:7.3.65 927 #define ERR_DATA_REP_DIS 0x00 // Default 928 #define ERR_DATA_REP_EN 0x01 929 930 /// LM modes HCI:5.2.20 931 #define LM_ACTIVE_MODE 0x00 932 #define LM_HOLD_MODE 0x01 933 #define LM_SNIFF_MODE 0x02 934 #define LM_PARK_MODE 0x03 935 936 /// Key Type HCI:5.2.24 937 #define COMB_KEY 0 938 #define LOCAL_UNIT_KEY 1 939 #define REMOTE_UNIT_KEY 2 940 #define DEBUG_COMB_KEY 3 941 #define UNAUTH_COMB_KEY_192 4 942 #define AUTH_COMB_KEY_192 5 943 #define CHANGED_COMB_KEY 6 944 #define UNAUTH_COMB_KEY_256 7 945 #define AUTH_COMB_KEY_256 8 946 947 /// Key Flag HCI:5.4.18 948 #define SEMI_PERMANENT_KEY 0x00 949 #define TEMPORARY_KEY 0x01 950 951 /// QOS Service Type HCI:4.6.6 952 #define QOS_NO_TRAFFIC 0x00 953 #define QOS_BEST_EFFORT 0x01 954 #define QOS_GUARANTEED 0x02 955 #define QOS_NOTSPECIFIED 0xFF 956 957 #define QOS_WILD_CARD 0xFFFFFFFF 958 959 /// RSSI golden range 960 #define RSSI_GOLDEN_RG 0x00 961 962 /// Inquiry TX power level (in dBm) HCI:7.3.62 963 #define INQ_TX_PWR_DBM_MIN -70 964 #define INQ_TX_PWR_DBM_DFT 0 965 #define INQ_TX_PWR_DBM_MAX +20 966 967 /// Bluetooth Test Mode defines Bluetooth Test Mode: Table 3.2 968 969 #define PAUSE_MODE 0x00 970 #define TXTEST0_MODE 0x01 971 #define TXTEST1_MODE 0x02 972 #define TXTEST10_MODE 0x03 973 #define PRAND_MODE 0x04 974 #define ACLLOOP_MODE 0x05 975 #define SCOLOOP_MODE 0x06 976 #define ACLNOWHIT_MODE 0x07 977 #define SCONOWHIT_MODE 0x08 978 #define TXTEST1100_MODE 0x09 979 #define EXITTEST_MODE 0xFF 980 981 #define HOPSINGLE 0x00 982 #define HOPUSA 0x01 983 984 #define FIXTXPOW 0x00 985 #define ADAPTTXPOW 0x01 986 987 /// Packet type parameter bit field of LMP_test_control 988 #define LMP_TEST_CTRL_PKT_TYPE_CODE_POS 0 989 #define LMP_TEST_CTRL_PKT_TYPE_CODE_MSK 0x0F 990 #define LMP_TEST_CTRL_PKT_TYPE_LINK_POS 4 991 #define LMP_TEST_CTRL_PKT_TYPE_LINK_MSK 0xF0 992 #define TEST_ACLSCO 0 993 #define TEST_ESCO 1 994 #define TEST_EDRACL 2 995 #define TEST_EDRESCO 3 996 997 /// LMP_encapsulated_header parameters LMP:5.3 998 #define LMP_ENCAPS_P192_MAJ_TYPE 1 999 #define LMP_ENCAPS_P192_MIN_TYPE 1 1000 #define LMP_ENCAPS_P192_PAYL_LEN 48 1001 #define LMP_ENCAPS_P192_PAYL_NB 3 1002 #define LMP_ENCAPS_P256_MAJ_TYPE 1 1003 #define LMP_ENCAPS_P256_MIN_TYPE 2 1004 #define LMP_ENCAPS_P256_PAYL_LEN 64 1005 #define LMP_ENCAPS_P256_PAYL_NB 4 1006 1007 /// Number of bits in the passkey code used during Secure Simple Pairing 1008 #define SSP_PASSKEY_NB_BITS 20 1009 1010 // Event Filter HCI 4.7.3 1011 1012 /// Filter type 1013 #define CLEAR_ALL_FILTER_TYPE 0x00 1014 #define INQUIRY_FILTER_TYPE 0x01 1015 #define CONNECTION_FILTER_TYPE 0x02 1016 1017 /// Filter size 1018 #define CLEAR_ALL_FILTER_SIZE 0 1019 1020 /// Inquiry & Connection Setup Filter Condition Type 1021 #define ALL_FILTER_CONDITION_TYPE 0x00 1022 #define CLASS_FILTER_CONDITION_TYPE 0x01 1023 #define BD_ADDR_FILTER_CONDITION_TYPE 0x02 1024 1025 /// Auto Accept Flag 1026 #define DO_NOT_AUTO_ACCEPT_CONNECTION 0x01 1027 #define ACCEPT_CONNECTION_SLAVE 0x02 1028 #define ACCEPT_CONNECTION_MASTER 0x03 1029 1030 /// Event Mask HCI 4.7.1 1031 #define NO_EVENTS_SPECIFIED_FILTER 0x00000000 1032 #define INQUIRY_COMPLETE_EVENT_FILTER 0x00000001 1033 #define INQUIRY_RESULT_EVENT_FILTER 0x00000002 1034 #define CONNECTION_COMPLETE_EVENT_FILTER 0x00000004 1035 #define CONNECTION_REQUEST_EVENT_FILTER 0x00000008 1036 #define DISCONNECTION_COMPLETE_EVENT_FILTER 0x00000010 1037 #define AUTHENTICATION_COMPLETE_EVENT_FILTER 0x00000020 1038 #define REMOTE_NAME_REQUEST_COMPLETE_EVENT_FILTER 0x00000040 1039 #define ENCRYPTION_CHANGE_EVENT_FILTER 0x00000080 1040 #define CHANGE_CONNECTION_LINK_KEY_COMPLETE_EVENT_FILTER 0x00000100 1041 #define MASTER_LINK_KEY_COMPLETE_EVENT_FILTER 0x00000200 1042 #define READ_REMOTE_SUPPORTED_FEATURES_COMPLETE_EVENT_FILTER 0x00000400 1043 #define READ_REMOTE_VERSION_INFORMATION_COMPLETE_EVENT_FILTER 0x00000800 1044 #define QOS_SETUP_COMPLETE_EVENT_FILTER 0x00001000 1045 #define COMMAND_COMPLETE_EVENT_FILTER 0x00002000 // Unchecked */ 1046 #define COMMAND_STATUS_EVENT_FILTER 0x00004000 // Unchecked */ 1047 #define HARDWARE_ERROR_EVENT_FILTER 0x00008000 1048 #define FLUSH_OCCURRED_EVENT_FILTER 0x00010000 1049 #define ROLE_CHANGE_EVENT_FILTER 0x00020000 1050 #define NUMBER_OF_COMPLETED_PACKETS_EVENT_FILTER 0x00040000 // Unchecked */ 1051 #define MODE_CHANGE_EVENT_FILTER 0x00080000 1052 #define RETURN_LINK_KEYS_EVENT_FILTER 0x00100000 1053 #define PIN_CODE_REQUEST_EVENT_FILTER 0x00200000 1054 #define LINK_KEY_REQUEST_EVENT_FILTER 0x00400000 1055 #define LINK_KEY_NOTIFICATION_EVENT_FILTER 0x00800000 1056 #define LOOPBACK_COMMAND_EVENT_FILTER 0x01000000 // Not implemented */ 1057 #define DATA_BUFFER_OVERFLOW_EVENT_FILTER 0x02000000 1058 #define MAX_SLOTS_CHANGE_EVENT_FILTER 0x04000000 1059 #define READ_CLOCK_OFFSET_COMPLETE_EVENT_FILTER 0x08000000 1060 #define CONNECTION_PACKET_TYPE_CHANGED_EVENT_FILTER 0x10000000 1061 #define QOS_VIOLATION_EVENT_FILTER 0x20000000 1062 #define PAGE_SCAN_MODE_CHANGE_EVENT_FILTER 0x40000000 // Deprecated */ 1063 #define PAGE_SCAN_REPETITION_MODE_CHANGE_EVENT_FILTER 0x80000000 1064 1065 #define FLOW_SPECIFICATION_COMPLETE_EVENT_FILTER 0x00000001 1066 #define INQUIRY_RESULT_WITH_RSSI_EVENT_FILTER 0x00000002 1067 #define READ_REMOTE_EXTENDED_FEATURES_COMPLETE_EVENT_FILTER 0x00000004 1068 #define SYNCHRONOUS_CONNECTION_COMPLETE_EVENT_FILTER 0x00000800 1069 #define SYNCHRONOUS_CONNECTION_CHANGE_EVENT_FILTER 0x00001000 1070 #define SNIFF_SUBRATING_EVENT_FILTER 0x00002000 1071 #define EXTENDED_INQUIRY_RESULT_EVENT_FILTER 0x00004000 1072 #define ENCRYPTION_KEY_REFRESH_COMPLETE_EVENT_FILTER 0x00008000 1073 #define IO_CAPABILITY_REQUEST_EVENT_FILTER 0x00010000 1074 #define IO_CAPABILITY_REQUEST_REPLY_EVENT_FILTER 0x00020000 1075 #define USER_CONFIRMATION_REQUEST_EVENT_FILTER 0x00040000 1076 #define USER_PASSKEY_REQUEST_EVENT_FILTER 0x00080000 1077 #define REMOTE_OOB_DATA_REQUEST_EVENT_FILTER 0x00100000 1078 #define SIMPLE_PAIRING_COMPLETE_EVENT_FILTER 0x00200000 1079 #define LINK_SUPERVISION_TIMEOUT_CHANGE_EVENT_FILTER 0x00800000 1080 #define ENHANCED_FLUSH_COMPLETE_EVENT_FILTER 0x01000000 1081 #define USER_PASSKEY_NOTIFICATION_EVENT_FILTER 0x04000000 1082 #define KEYPRESS_NOTIFICATION_EVENT_FILTER 0x08000000 1083 #define REM_HOST_SUPPORTED_FEATURES_NOTIFICATION_EVENT_FILTER 0x10000000 1084 1085 /// HostControllerToHostFlowControl (ACL) HCI 7.3.40 1086 #define FLOW_CONTROL_OFF 0x00 1087 #define FLOW_CONTROL_ACL 0x01 1088 #define FLOW_CONTROL_SCO 0x02 1089 #define FLOW_CONTROL_ACL_SCO 0x03 1090 1091 /// SynchroinousFlowControlEnable (SCO) HCI 7.3.39 1092 #define SYNC_FLOW_CONTROL_OFF 0x00 1093 #define SYNC_FLOW_CONTROL_ON 0x01 1094 1095 /// Tx Power HCI:4.7.37 1096 #define CURRENT_TX_POWER 0x00 1097 #define MAX_TX_POWER 0x01 1098 1099 /// Flow_direction HCI:7.2.13 1100 #define FLOW_DIR_OUT 0x00 1101 #define FLOW_DIR_IN 0x01 1102 1103 /// Drift and Jitter default value LMP 5.2 1104 #define DRIFT_BLE_DFT 500 1105 #define DRIFT_BT_DFT 250 1106 #define JITTER_DFT 10 1107 #define DRIFT_BT_ACTIVE_MAX 20 // BB:2.2.5 1108 1109 /// Read Stored Link Key HCI:4.7.8 1110 #define LINK_KEY_BD_ADDR 0x00 1111 #define LINK_KEY_ALL 0x01 1112 1113 /// Read/Write Hold Mode Activity HCI:4.7.35 and 4.7.36 1114 #define HOLD_MODE_ACTIV_DEFAULT 0x00 1115 #define HOLD_MODE_ACTIV_SUSP_PAGE_SCAN 0x01 1116 #define HOLD_MODE_ACTIV_SUSP_INQUIRY_SCAN 0x02 1117 #define HOLD_MODE_ACTIV_SUSP_PERIODIC_INQ 0x04 1118 #define HOLD_MODE_ACTIV_NOT_MASK 0xF8 1119 1120 /// AFH Mode 1121 #define AFH_DISABLED 0x00 1122 #define AFH_ENABLED 0x01 1123 1124 /// AFH Reporting Mode 1125 #define AFH_REPORTING_DISABLED 0x00 1126 #define AFH_REPORTING_ENABLED 0x01 1127 1128 /// AFH channel assessment Mode 1129 #define AFH_CH_ASS_DISABLED 0x00 1130 #define AFH_CH_ASS_ENABLED 0x01 1131 1132 /// AFH MIn/Max interval, in BT slots (1s - 30s) 1133 #define AFH_REPORT_INTERVAL_MIN 0x0640 1134 #define AFH_REPORT_INTERVAL_MAX 0xBB80 1135 1136 /// Channel classification values for frequency pairs 1137 #define AFH_CH_CLASS_UNKNOWN 0x0 1138 #define AFH_CH_CLASS_GOOD 0x1 1139 #define AFH_CH_CLASS_RESERVED 0x2 1140 #define AFH_CH_CLASS_BAD 0x3 1141 1142 /// Maximum number of frequencies used in adapted channel hopping sequence 1143 #define AFH_NB_CHANNEL_MIN 20 1144 #define AFH_NB_CHANNEL_MAX 79 1145 1146 /// Number of frequencies available in standard hopping sequence 1147 #define HOP_NB_CHANNEL 79 1148 1149 /// Base frequency in MHz of first BT hop channel [f=2402+k MHz, k=0,...,78] 1150 #define HOP_CHANNEL_BASE_MHZ 2402 1151 1152 /// Maximum number of frequencies used in synchronization train BB:2.6.4.8 1153 #define SYNC_TRAIN_CHANNEL_NB 3 1154 /// Indices of frequencies used in synchronization train 1155 #define SYNC_TRAIN_CHANNEL_0 0 1156 #define SYNC_TRAIN_CHANNEL_1 24 1157 #define SYNC_TRAIN_CHANNEL_2 78 1158 1159 /// Maximum delay in synchronization train (in slots) BB:2.7.2 1160 #define SYNC_TRAIN_DELAY_MAX_DFT 16 1161 /// Maximum delay in synchronization train for Coarse clock adjustment (in slots) BB:2.7.2 1162 #define SYNC_TRAIN_DELAY_MAX_CLK_ADJ 4 1163 /// Synchronization train interval for Coarse clock adjustment (in slots) BB:2.7.2 1164 #define SYNC_TRAIN_INTV_CLK_ADJ 32 1165 1166 /// Future CSB instant value offset for Coarse clock adjustment (in slots) BB: 8.11.2 1167 #define SYNC_TRAIN_CSB_INSTANT_OFFSET_CLK_ADJ 1600 1168 1169 /// Minimum value for synchronization train interval (in slots) HCI:7.3.90 1170 #define SYNC_TRAIN_INTV_MIN 0x20 1171 /// Minimum value for synchronization train timeout (in slots) HCI:7.3.90 1172 #define SYNC_TRAIN_TO_MIN 0x00000002 1173 /// Maximum value for synchronization train timeout (in slots) HCI:7.3.90 1174 #define SYNC_TRAIN_TO_MAX 0x07FFFFFE 1175 1176 /// Default value for synchronization train interval (in slots) HCI:6.36 1177 #define SYNC_TRAIN_INTV_DEFAULT 0x80 1178 /// Default value for synchronization train timeout (in slots) HCI:6.37 1179 #define SYNC_TRAIN_TO_DEFAULT 0x0002EE00 1180 /// Default value for synchronization train service data HCI:6.39 1181 #define SYNC_TRAIN_SVC_DATA_DEFAULT 0x00 1182 1183 /// Minimum value for synchronization scan timeout (in slots) HCI:7.1.52 1184 #define SYNC_SCAN_TO_MIN 0x22 1185 /// Minimum value for synchronization scan window (in slots) HCI:7.1.52 1186 #define SYNC_SCAN_WIN_MIN 0x22 1187 /// Minimum value for synchronization scan interval (in slots) HCI:7.1.52 1188 #define SYNC_SCAN_INTV_MIN 0x02 1189 1190 /// Default value for synchronization scan timeout (in slots) BB: Apppendix B 1191 #define SYNC_SCAN_TO_DEFAULT 0x2000 1192 /// Recommended value for synchronization scan window (91.25ms) GAP: Appendix A 1193 #define SYNC_SCAN_WIN_DEFAULT 0x0092 1194 /// Recommended value for synchronization scan interval (320 ms) GAP: Appendix A 1195 #define SYNC_SCAN_INTV_DEFAULT 0x0200 1196 1197 /// CSB receive enable HCI:7.1.50 1198 #define CSB_RX_MODE_DIS 0x00 1199 #define CSB_RX_MODE_EN 0x01 1200 1201 /// CSB fragment HCI:7.2.88 1202 #define CSB_CONTINUATION_FRAGMENT 0 1203 #define CSB_STARTING_FRAGMENT 1 1204 #define CSB_ENDING_FRAGMENT 2 1205 #define CSB_NO_FRAGMENTATION 3 1206 1207 /// CSB max fragment size HCI:7.2.88 1208 #define CSB_FRAGMENT_SIZE_MAX 0xFF 1209 1210 /// MWS Channel_Enable 1211 #define MWS_CHANNEL_DISABLED 0x00 1212 #define MWS_CHANNEL_ENABLED 0x01 1213 1214 /// MWS Channel_Type 1215 #define MWS_TDD_CHANNEL_TYPE 0x00 1216 #define MWS_FDD_CHANNEL_TYPE 0x01 1217 1218 /// MWS Transport_Layer 1219 #define MWS_SIGNALING_ONLY 0x00 1220 #define MWS_WCI_1 0x01 1221 #define MWS_WCI_2 0x02 1222 #define MWS_TRANSPORT_TYPE_MAX 0x02 1223 1224 /// MWS PATTERN Index 1225 #define MWS_PATTERN_INDEX_MAX 2 1226 1227 /// MWS PATTERN IntervalType 1228 #define MWS_PATTERN_NO_TXRX 0 1229 #define MWS_PATTERN_TX_ALLOWED 1 1230 #define MWS_PATTERN_RX_ALLOWED 2 1231 #define MWS_PATTERN_TXRX_ALLOWED 3 1232 #define MWS_PATTERN_EXT_FRAME 4 1233 #define MWS_PATTERN_TYPE_MAX 4 1234 1235 1236 /// MWS Ext_Num_Periods 1237 #define MWS_EXT_NUM_PERIODS_MIN 0x01 1238 #define MWS_EXT_NUM_PERIODS_MAX 0x32 1239 1240 /// MWS Period_Type 1241 #define MWS_PERIOD_TYPE_DOWNLINK 0x00 1242 #define MWS_PERIOD_TYPE_UPLINK 0x01 1243 #define MWS_PERIOD_TYPE_BIDIRECTIONAL 0x02 1244 #define MWS_PERIOD_TYPE_GUARD_PERIOD 0x03 1245 #define MWS_PERIOD_TYPE_RESERVED 0x04 1246 1247 /// Simple pairing mode HCI:7.3.58/HCI:7.3.59 1248 #define SP_MODE_DIS 0x00 1249 #define SP_MODE_EN 0x01 1250 1251 /// Inquiry Scan Type and Page Scan Type HCI:6.4/HCI:6.11 1252 #define STANDARD_SCAN 0x00 1253 #define INTERLACED_SCAN 0x01 1254 1255 /// Default interlace offset used for frequency selection during interlaced inquiry/page scan BB:8.3.1/8.4.1 1256 #define INTERLACE_OFFSET_DFT 16 1257 1258 /// Inquiry Mode 1259 #define STANDARD_INQUIRY 0x00 1260 #define RSSI_INQUIRY 0x01 1261 #define EXTENDED_INQUIRY 0x02 1262 1263 /// Maximum number of link keys Host can write via HCI Write Stored Link Key Command 1264 #define NB_LINK_KEY 0x0B 1265 1266 /// LMP Version 1267 #define BT_LMP_V1_0 0 1268 #define BT_LMP_V1_1 1 1269 #define BT_LMP_V1_2 2 1270 #define BT_LMP_V2_0 3 1271 #define BT_LMP_V2_1 4 1272 #define BT_LMP_V3_0 5 1273 #define BT_LMP_V4_0 6 1274 #define BT_LMP_V4_1 7 1275 1276 /// WhichClock parameter 1277 #define LOCAL_CLOCK 0 1278 #define PICONET_CLOCK 1 1279 1280 /// Clock Accuracy parameter 1281 #define CLOCK_ACCURACY_UNKNOWN 0xFFFF 1282 1283 #define SP_PASSKEY_STARTED 0x00 1284 #define SP_PASSKEY_DIGIT_ENTERED 0x01 1285 #define SP_PASSKEY_DIGIT_ERASED 0x02 1286 #define SP_PASSKEY_CLEARED 0x03 1287 #define SP_PASSKEY_COMPLETED 0x04 1288 1289 /// Low Power Mode 1290 #define PARK_BEACON_MIN 0x000E 1291 1292 /// RWBT Device can be slave of 2 master at max 1293 #define MAX_SLAVES_FOR_DIFFERENT_MASTERS 2 1294 // Flags for ld_util_get_nb_acl function 1295 /// Flag for master link 1296 #define MASTER_FLAG 0x01 1297 /// Flag for slave link 1298 #define SLAVE_FLAG 0x02 1299 1300 /// BLE event mask 1301 enum le_evt_mask 1302 { 1303 LE_CON_CMP_EVT_BIT = 0, 1304 LE_CON_CMP_EVT_MSK = 0x0001, 1305 LE_ADV_REP_EVT_BIT = 1, 1306 LE_ADV_REP_EVT_MSK = 0x0002, 1307 LE_CON_UPD_EVT_BIT = 2, 1308 LE_CON_UPD_EVT_MSK = 0x0004, 1309 LE_CON_RD_REM_FEAT_EVT_BIT = 3, 1310 LE_CON_RD_REM_FEAT_EVT_MSK = 0x0008, 1311 LE_LG_TR_KEY_REQ_EVT_BIT = 4, 1312 LE_LG_TR_KEY_REQ_EVT_MSK = 0x0010, 1313 LE_REM_CON_PARA_REQ_EVT_BIT = 5, 1314 LE_REM_CON_PARA_REQ_EVT_MSK = 0x0020, 1315 LE_DATA_LEN_CHG_EVT_BIT = 6, 1316 LE_DATA_LEN_CHG_EVT_MSK = 0x0040, 1317 LE_RD_LOC_P256_PUB_KEY_CMP_EVT_BIT = 7, 1318 LE_RD_LOC_P256_PUB_KEY_CMP_EVT_MSK = 0x0080, 1319 LE_GEN_DHKEY_CMP_EVT_BIT = 8, 1320 LE_GEN_DHKEY_CMP_EVT_MSK = 0x0100, 1321 LE_ENH_CON_CMP_EVT_BIT = 9, 1322 LE_ENH_CON_CMP_EVT_MSK = 0x0200, 1323 LE_DIR_ADV_REP_EVT_BIT = 10, 1324 LE_DIR_ADV_REP_EVT_MSK = 0x0400, 1325 1326 LE_DFT_EVT_MSK = 0x1F, 1327 }; 1328 1329 /// Enhanced Synchronous Connection HCI:7.1.41 & 7.1.42 1330 #define CODING_FORMAT_ULAW 0x00 1331 #define CODING_FORMAT_ALAW 0x01 1332 #define CODING_FORMAT_CVSD 0x02 1333 #define CODING_FORMAT_TRANSP 0x03 1334 #define CODING_FORMAT_LINPCM 0x04 1335 #define CODING_FORMAT_MSBC 0x05 1336 #define CODING_FORMAT_VENDSPEC 0xFF 1337 1338 #define PCM_FORMAT_NA 0x00 1339 #define PCM_FORMAT_1SCOMP 0x01 1340 #define PCM_FORMAT_2SCOMP 0x02 1341 #define PCM_FORMAT_SIGNMAG 0x03 1342 #define PCM_FORMAT_UNSIGNED 0x04 1343 1344 #define PCM_SAMPLE_SIZE_8BITS 8 1345 #define PCM_SAMPLE_SIZE_16BITS 16 1346 1347 #define AUDIO_DATA_PATH_HCI 0 1348 #define AUDIO_DATA_PATH_PCM 1 1349 1350 /// Default maximum number of slots per packet 1351 #define MAX_SLOT_DFT 1 1352 1353 /// Packet type code interpretation possibilities BB:6.5 1354 #define ID_NUL_TYPE 0x0 1355 #define POLL_TYPE 0x1 1356 #define FHS_TYPE 0x2 1357 #define DM1_TYPE 0x3 1358 #define DH1_TYPE 0x4 1359 #define DH1_2_TYPE 0x4 1360 #define DH1_3_TYPE 0x8 1361 #define HV1_TYPE 0x5 1362 #define HV2_TYPE 0x6 1363 #define EV3_2_TYPE 0x6 1364 #define HV3_TYPE 0x7 1365 #define EV3_TYPE 0x7 1366 #define EV3_3_TYPE 0x7 1367 #define DV_TYPE 0x8 1368 #define AUX1_TYPE 0x9 1369 #define DM3_TYPE 0xA 1370 #define DH3_TYPE 0xB 1371 #define DH3_2_TYPE 0xA 1372 #define DH3_3_TYPE 0xB 1373 #define EV4_TYPE 0xC 1374 #define EV5_2_TYPE 0xC 1375 #define EV5_TYPE 0xD 1376 #define EV5_3_TYPE 0xD 1377 #define DM5_TYPE 0xE 1378 #define DH5_TYPE 0xF 1379 #define DH5_2_TYPE 0xE 1380 #define DH5_3_TYPE 0xF 1381 1382 /// Format of the FHS payload BB:6.5.1.4 1383 #define FHS_PAR_BITS_POS 0 1384 #define FHS_PAR_BITS_LEN 34 1385 #define FHS_PAR_BITS_END (FHS_PAR_BITS_POS + FHS_PAR_BITS_LEN) 1386 #define FHS_LAP_POS FHS_PAR_BITS_END 1387 #define FHS_LAP_LEN 24 1388 #define FHS_LAP_END (FHS_LAP_POS + FHS_LAP_LEN) 1389 #define FHS_EIR_POS FHS_LAP_END 1390 #define FHS_EIR_LEN 1 1391 #define FHS_EIR_END (FHS_EIR_POS + FHS_EIR_LEN) 1392 #define FHS_UNDEF_POS FHS_EIR_END 1393 #define FHS_UNDEF_LEN 1 1394 #define FHS_UNDEF_END (FHS_UNDEF_POS + FHS_UNDEF_LEN) 1395 #define FHS_SR_POS FHS_UNDEF_END 1396 #define FHS_SR_LEN 2 1397 #define FHS_SR_END (FHS_SR_POS + FHS_SR_LEN) 1398 #define FHS_RSVD_POS FHS_SR_END 1399 #define FHS_RSVD_LEN 2 1400 #define FHS_RSVD_END (FHS_RSVD_POS + FHS_RSVD_LEN) 1401 #define FHS_UAP_POS FHS_RSVD_END 1402 #define FHS_UAP_LEN 8 1403 #define FHS_UAP_END (FHS_UAP_POS + FHS_UAP_LEN) 1404 #define FHS_NAP_POS FHS_UAP_END 1405 #define FHS_NAP_LEN 16 1406 #define FHS_NAP_END (FHS_NAP_POS + FHS_NAP_LEN) 1407 #define FHS_CLASS_OF_DEV_POS FHS_NAP_END 1408 #define FHS_CLASS_OF_DEV_LEN 24 1409 #define FHS_CLASS_OF_DEV_END (FHS_CLASS_OF_DEV_POS + FHS_CLASS_OF_DEV_LEN) 1410 #define FHS_LT_ADDR_POS FHS_CLASS_OF_DEV_END 1411 #define FHS_LT_ADDR_LEN 3 1412 #define FHS_LT_ADDR_END (FHS_LT_ADDR_POS + FHS_LT_ADDR_LEN) 1413 #define FHS_CLK_POS FHS_LT_ADDR_END 1414 #define FHS_CLK_LEN 26 1415 #define FHS_CLK_END (FHS_CLK_POS + FHS_CLK_LEN) 1416 #define FHS_PAGE_SCAN_MODE_POS FHS_CLK_END 1417 #define FHS_PAGE_SCAN_MODE_LEN 3 1418 #define FHS_PAGE_SCAN_MODE_END (FHS_PAGE_SCAN_MODE_POS + FHS_PAGE_SCAN_MODE_LEN) 1419 1420 /// Format of the STP payload BB:8.11.2 1421 #define STP_CLK_POS 0 1422 #define STP_CLK_LEN 4 1423 #define STP_FUT_CSB_INST_POS 4 1424 #define STP_FUT_CSB_INST_LEN 4 1425 #define STP_AFH_CH_MAP_POS 8 1426 #define STP_AFH_CH_MAP_LEN 10 1427 #define STP_MST_BD_ADDR_POS 18 1428 #define STP_MST_BD_ADDR_LEN 6 1429 #define STP_CSB_INTV_POS 24 1430 #define STP_CSB_INTV_LEN 2 1431 #define STP_CSB_LT_ADDR_POS 26 1432 #define STP_CSB_LT_ADDR_LEN 1 1433 #define STP_SVC_DATA_POS 27 1434 #define STP_SVC_DATA_LEN 1 1435 #define STP_PACKET_SIZE 28 1436 1437 /// CSB Receive status HCI:7.7.69 1438 #define CSB_RX_OK 0x00 1439 #define CSB_RX_KO 0x01 1440 1441 /* 1442 * ENUMERATIONS 1443 **************************************************************************************** 1444 */ 1445 1446 ///Transmit Power level types 1447 enum 1448 { 1449 ///Current Power Level 1450 TX_PW_LVL_CURRENT = 0x00, 1451 ///Maximum power level 1452 TX_PW_LVL_MAX, 1453 ///Enumeration end value for power level type value check 1454 TX_PW_LVL_END, 1455 }; 1456 1457 ///Controller to Host flow control 1458 enum 1459 { 1460 /// C-> H flow control off 1461 FLOW_CTRL_OFF = 0x00, 1462 ///C->H ACL flow control on only 1463 FLOW_CTRL_ON_ACL_OFF_SYNC, 1464 ///C->H Sync flow control on only 1465 FLOW_CTRL_OFF_ACL_ON_SYNC, 1466 ///C->H ACL and Sync flow control on 1467 FLOW_CTRL_ON_ACL_ON_SYNC, 1468 ///Enumeration end value for flow control value check 1469 FLOW_CTRL_END 1470 }; 1471 1472 ///LE Supported Host enable 1473 enum 1474 { 1475 ///Disable LE supported Host 1476 LE_SUPP_HOST_DIS = 0x00, 1477 ///Enable LE Supported Host 1478 LE_SUPP_HOST_EN, 1479 ///Enumeration end value for LE supported Host enable check 1480 LE_SUPP_HOST_END 1481 }; 1482 1483 ///Simultaneous LE Host enable 1484 enum 1485 { 1486 ///Disable LE simultaneous Host disable 1487 SIMULT_LE_HOST_DIS = 0x00, 1488 ///Enable LE simultaneous Host disable 1489 SIMULT_LE_HOST_EN, 1490 ///Enumeration end value for LE simultaneous Host enable check 1491 SIMULT_LE_HOST_END 1492 }; 1493 1494 ///Advertising HCI Type 1495 enum 1496 { 1497 ///Connectable Undirected advertising 1498 ADV_CONN_UNDIR = 0x00, 1499 ///Connectable high duty cycle directed advertising 1500 ADV_CONN_DIR, 1501 ///Discoverable undirected advertising 1502 ADV_DISC_UNDIR, 1503 ///Non-connectable undirected advertising 1504 ADV_NONCONN_UNDIR, 1505 ///Connectable low duty cycle directed advertising 1506 ADV_CONN_DIR_LDC, 1507 ///Enumeration end value for advertising type value check 1508 ADV_END 1509 }; 1510 1511 ///Scanning HCI Type 1512 enum 1513 { 1514 ///Scan request 1515 SCAN_REQ, 1516 ///Scan response 1517 SCAN_RSP, 1518 ///Enumeration end value for scanning type value check 1519 SCAN_LEN 1520 }; 1521 1522 ///BD address type 1523 enum 1524 { 1525 ///Public BD address 1526 ADDR_PUBLIC = 0x00, 1527 ///Random BD Address 1528 ADDR_RAND, 1529 /// Controller generates Resolvable Private Address based on the 1530 /// local IRK from resolving list. If resolving list contains no matching 1531 /// entry, use public address. 1532 ADDR_RPA_OR_PUBLIC, 1533 /// Controller generates Resolvable Private Address based on the 1534 /// local IRK from resolving list. If resolving list contains no matching 1535 /// entry, use random address. 1536 ADDR_RPA_OR_RAND, 1537 ///Enumeration end value for BD address type value check 1538 ADDR_END, 1539 1540 /// mask used to determine Address type in the air 1541 ADDR_MASK = 0x01, 1542 /// mask used to determine if an address is an RPA 1543 ADDR_RPA_MASK = 0x02, 1544 }; 1545 1546 /// Random Address type (2 MSB of the LE BD Address) 1547 enum rnd_addr_type 1548 { 1549 /// Static random address - 11 (MSB->LSB) 1550 RND_STATIC_ADDR = 0xC0, 1551 /// Private non resolvable address - 01 (MSB->LSB) 1552 RND_NON_RSLV_ADDR = 0x00, 1553 /// Private resolvable address - 01 (MSB->LSB) 1554 RND_RSLV_ADDR = 0x40, 1555 }; 1556 1557 ///Advertising channels enables 1558 enum adv_channel_map 1559 { 1560 ///Byte value for advertising channel map for channel 37 enable 1561 ADV_CHNL_37_EN = 0x01, 1562 ///Byte value for advertising channel map for channel 38 enable 1563 ADV_CHNL_38_EN, 1564 ///Byte value for advertising channel map for channel 39 enable 1565 ADV_CHNL_39_EN = 0x04, 1566 ///Byte value for advertising channel map for channel 37, 38 and 39 enable 1567 ADV_ALL_CHNLS_EN = 0x07, 1568 ///Enumeration end value for advertising channels enable value check 1569 ADV_CHNL_END 1570 }; 1571 1572 ///Advertising filter policy 1573 enum adv_filter_policy 1574 { 1575 ///Allow both scan and connection requests from anyone 1576 ADV_ALLOW_SCAN_ANY_CON_ANY = 0x00, 1577 ///Allow both scan req from White List devices only and connection req from anyone 1578 ADV_ALLOW_SCAN_WLST_CON_ANY, 1579 ///Allow both scan req from anyone and connection req from White List devices only 1580 ADV_ALLOW_SCAN_ANY_CON_WLST, 1581 ///Allow scan and connection requests from White List devices only 1582 ADV_ALLOW_SCAN_WLST_CON_WLST, 1583 ///Enumeration end value for advertising filter policy value check 1584 ADV_ALLOW_SCAN_END 1585 }; 1586 1587 ///Advertising enables 1588 enum 1589 { 1590 ///Disable advertising 1591 ADV_DIS = 0x00, 1592 ///Enable advertising 1593 ADV_EN, 1594 ///Enumeration end value for advertising enable value check 1595 ADV_EN_END 1596 }; 1597 1598 ///LE Scan type 1599 enum 1600 { 1601 ///Passive scan 1602 SCAN_PASSIVE = 0x00, 1603 ///Active scan 1604 SCAN_ACTIVE, 1605 ///Enumeration end value for scan type value check 1606 SCAN_END 1607 }; 1608 1609 ///Scan filter policy 1610 enum scan_filter_policy 1611 { 1612 ///Allow advertising packets from anyone 1613 SCAN_ALLOW_ADV_ALL = 0x00, 1614 ///Allow advertising packets from White List devices only 1615 SCAN_ALLOW_ADV_WLST, 1616 ///Allow advertising packets from anyone and Direct adv using RPA in InitA 1617 SCAN_ALLOW_ADV_ALL_AND_INIT_RPA, 1618 ///Allow advertising packets from White List devices only and Direct adv using RPA in InitA 1619 SCAN_ALLOW_ADV_WLST_AND_INIT_RPA, 1620 ///Enumeration end value for scan filter policy value check 1621 SCAN_ALLOW_ADV_END 1622 }; 1623 1624 ///Le Scan enables 1625 enum 1626 { 1627 ///Disable scan 1628 SCAN_DIS = 0x00, 1629 ///Enable scan 1630 SCAN_EN, 1631 ///Enumeration end value for scan enable value check 1632 SCAN_EN_END 1633 }; 1634 1635 ///Filter duplicates 1636 enum scan_dup_filter_policy 1637 { 1638 ///Disable filtering of duplicate packets 1639 SCAN_FILT_DUPLIC_DIS = 0x00, 1640 ///Enable filtering of duplicate packets 1641 SCAN_FILT_DUPLIC_EN, 1642 ///Enumeration end value for scan duplicate filtering value check 1643 SCAN_FILT_DUPLIC_END 1644 }; 1645 1646 ///Initiator Filter policy 1647 enum 1648 { 1649 ///Initiator will ignore White List 1650 INIT_FILT_IGNORE_WLST = 0x00, 1651 ///Initiator will use White List 1652 INIT_FILT_USE_WLST, 1653 ///Enumeration end value for initiator filter policy value check 1654 INIT_FILT_END 1655 }; 1656 1657 ///Transmitter test Packet Payload Type 1658 enum 1659 { 1660 ///Pseudo-random 9 TX test payload type 1661 PAYL_PSEUDO_RAND_9 = 0x00, 1662 ///11110000 TX test payload type 1663 PAYL_11110000, 1664 ///10101010 TX test payload type 1665 PAYL_10101010, 1666 ///Pseudo-random 15 TX test payload type 1667 PAYL_PSEUDO_RAND_15, 1668 ///All 1s TX test payload type 1669 PAYL_ALL_1, 1670 ///All 0s TX test payload type 1671 PAYL_ALL_0, 1672 ///00001111 TX test payload type 1673 PAYL_00001111, 1674 ///01010101 TX test payload type 1675 PAYL_01010101, 1676 ///Enumeration end value for TX test payload type value check 1677 PAYL_END 1678 }; 1679 1680 /// Constant defining the role 1681 enum 1682 { 1683 ///Master role 1684 ROLE_MASTER, 1685 ///Slave role 1686 ROLE_SLAVE, 1687 ///Enumeration end value for role value check 1688 ROLE_END 1689 }; 1690 1691 /// Constant clock accuracy 1692 enum 1693 { 1694 ///Clock accuracy at 500PPM 1695 SCA_500PPM, 1696 ///Clock accuracy at 250PPM 1697 SCA_250PPM, 1698 ///Clock accuracy at 150PPM 1699 SCA_150PPM, 1700 ///Clock accuracy at 100PPM 1701 SCA_100PPM, 1702 ///Clock accuracy at 75PPM 1703 SCA_75PPM, 1704 ///Clock accuracy at 50PPM 1705 SCA_50PPM, 1706 ///Clock accuracy at 30PPM 1707 SCA_30PPM, 1708 ///Clock accuracy at 20PPM 1709 SCA_20PPM 1710 }; 1711 1712 ///Advertising pdu Type 1713 enum 1714 { 1715 /// Undirected advertising 1716 LL_ADV_CONN_UNDIR = 0x00, 1717 /// Directed advertising 1718 LL_ADV_CONN_DIR, 1719 /// Non Connectable advertising 1720 LL_ADV_NONCONN_UNDIR, 1721 /// Scan Request 1722 LL_SCAN_REQ, 1723 /// Scan Response 1724 LL_SCAN_RSP, 1725 /// Connect Request 1726 LL_CONNECT_REQ, 1727 /// Discoverable advertising 1728 LL_ADV_DISC_UNDIR, 1729 LL_ADV_END 1730 }; 1731 1732 /// LLID packet 1733 enum 1734 { 1735 /// Reserved for future use 1736 LLID_RFU, 1737 /// Continue 1738 LLID_CONTINUE, 1739 /// Start 1740 LLID_START, 1741 /// Control 1742 LLID_CNTL, 1743 /// End 1744 LLID_END, 1745 }; 1746 1747 /// Remote OOB Data present parameter value HCI:7.1.29 1748 enum 1749 { 1750 REM_OOB_DATA_NO = 0x00, 1751 REM_OOB_DATA_P192 = 0x01, 1752 REM_OOB_DATA_P256 = 0x02, 1753 REM_OOB_DATA_P192_P256 = 0x03, 1754 }; 1755 1756 /// Encryption enabled parameter in HCI_Enc_Chg_Evt HCI:7.7.8 1757 enum 1758 { 1759 ENC_OFF = 0x00, 1760 ENC_BRDER_E0_LE_AESCCM = 0x01, 1761 ENC_BREDR_AESCC = 0x02, 1762 }; 1763 1764 1765 /* 1766 * STRUCTURE DEFINITONS 1767 **************************************************************************************** 1768 */ 1769 1770 ///BD name structure 1771 struct bd_name 1772 { 1773 ///length for name 1774 uint8_t namelen; 1775 ///array of bytes for name 1776 uint8_t name[BD_NAME_SIZE]; 1777 }; 1778 1779 ///Structure device name 1780 struct device_name 1781 { 1782 ///array of bytes for name 1783 uint8_t name[BD_NAME_SIZE]; 1784 }; 1785 1786 ///Structure name vector 1787 struct name_vect 1788 { 1789 uint8_t vect[NAME_VECT_SIZE]; 1790 }; 1791 1792 /// lap structure 1793 struct lap 1794 { 1795 /// LAP 1796 uint8_t A[BD_ADDR_LAP_LEN]; 1797 }; 1798 1799 /// class structure 1800 struct devclass 1801 { 1802 /// class 1803 uint8_t A[DEV_CLASS_LEN]; 1804 }; 1805 1806 ///Extended inquiry response structure 1807 struct eir 1808 { 1809 /// eir data 1810 uint8_t data[EIR_DATA_SIZE]; 1811 }; 1812 1813 ///Event mask structure 1814 struct evt_mask 1815 { 1816 ///8-byte array for mask value 1817 uint8_t mask[EVT_MASK_LEN]; 1818 }; 1819 1820 ///Host number of completed packets structure, for 1 connection handle 1821 struct host_cmpl_pkts 1822 { 1823 ///Connection handle 1824 uint16_t con_hdl; 1825 ///Number of completed packets 1826 uint16_t nb_cmpl_pkts; 1827 }; 1828 1829 ///BD Address structure 1830 struct bd_addr 1831 { 1832 ///6-byte array address value 1833 uint8_t addr[BD_ADDR_LEN]; 1834 }; 1835 1836 ///Access Address structure 1837 struct access_addr 1838 { 1839 ///4-byte array access address 1840 uint8_t addr[ACCESS_ADDR_LEN]; 1841 }; 1842 1843 ///Advertising data structure 1844 struct adv_data 1845 { 1846 ///Maximum length data bytes array 1847 uint8_t data[ADV_DATA_LEN]; 1848 }; 1849 1850 ///Scan response data structure 1851 struct scan_rsp_data 1852 { 1853 ///Maximum length data bytes array 1854 uint8_t data[SCAN_RSP_DATA_LEN]; 1855 }; 1856 1857 ///Channel map structure 1858 struct chnl_map 1859 { 1860 ///10-bytes channel map array 1861 uint8_t map[CHNL_MAP_LEN]; 1862 }; 1863 1864 ///Channel map structure 1865 struct le_chnl_map 1866 { 1867 ///5-byte channel map array 1868 uint8_t map[LE_CHNL_MAP_LEN]; 1869 }; 1870 1871 ///Long Term Key structure 1872 struct ltk 1873 { 1874 ///16-byte array for LTK value 1875 uint8_t ltk[KEY_LEN]; 1876 }; 1877 1878 ///Identity Resolving Key structure 1879 struct irk 1880 { 1881 ///16-byte array for IRK value 1882 uint8_t key[KEY_LEN]; 1883 }; 1884 1885 /// Initialization vector (for AES-CCM encryption) 1886 struct initialization_vector 1887 { 1888 ///8-byte array 1889 uint8_t vect[IV_LEN]; 1890 }; 1891 1892 /// Bluetooth address with link key 1893 struct bd_addr_plus_key 1894 { 1895 /// BD Address 1896 struct bd_addr bd_addr; 1897 /// Link Key 1898 struct ltk link_key; 1899 }; 1900 1901 ///Random number structure 1902 struct rand_nb 1903 { 1904 ///8-byte array for random number 1905 uint8_t nb[RAND_NB_LEN]; 1906 }; 1907 1908 ///Advertising report structure 1909 struct adv_report 1910 { 1911 ///Event type: 1912 /// - ADV_CONN_UNDIR: Connectable Undirected advertising 1913 /// - ADV_CONN_DIR: Connectable directed advertising 1914 /// - ADV_DISC_UNDIR: Discoverable undirected advertising 1915 /// - ADV_NONCONN_UNDIR: Non-connectable undirected advertising 1916 uint8_t evt_type; 1917 ///Advertising address type: public/random 1918 uint8_t adv_addr_type; 1919 ///Advertising address value 1920 struct bd_addr adv_addr; 1921 ///Data length in advertising packet 1922 uint8_t data_len; 1923 ///Data of advertising packet 1924 uint8_t data[ADV_DATA_LEN]; 1925 ///RSSI value for advertising packet 1926 uint8_t rssi; 1927 }; 1928 1929 1930 ///Direct Advertising report structure 1931 struct dir_adv_report 1932 { 1933 ///Event type: 1934 /// - ADV_CONN_DIR: Connectable directed advertising 1935 uint8_t evt_type; 1936 ///Address type: public/random 1937 uint8_t addr_type; 1938 ///Address value 1939 struct bd_addr addr; 1940 ///Direct address type: public/random 1941 uint8_t dir_addr_type; 1942 ///Direct address value 1943 struct bd_addr dir_addr; 1944 ///RSSI value for advertising packet 1945 uint8_t rssi; 1946 }; 1947 1948 ///Supported LE Features structure 1949 struct le_features 1950 { 1951 ///8-byte array for LE features 1952 uint8_t feats[LE_FEATS_LEN]; 1953 }; 1954 1955 ///Simple pairing hash structure 1956 struct hash 1957 { 1958 ///16-byte array for LTK value 1959 uint8_t C[KEY_LEN]; 1960 }; 1961 1962 ///Simple pairing randomizer structure 1963 struct randomizer 1964 { 1965 ///16-byte array for LTK value 1966 uint8_t R[KEY_LEN]; 1967 }; 1968 1969 ///Pin code structure 1970 struct pin_code 1971 { 1972 ///16-byte array for PIN value 1973 uint8_t pin[PIN_CODE_MAX_LEN]; 1974 }; 1975 1976 ///Sres structure 1977 struct sres_nb 1978 { 1979 ///8-byte array for random number 1980 uint8_t nb[SRES_LEN]; 1981 }; 1982 1983 ///aco structure 1984 struct aco 1985 { 1986 ///8-byte array for random number 1987 uint8_t a[ACO_LEN]; 1988 }; 1989 1990 ///struct byte 16 to stay align with the sdl version 1991 struct byte16 1992 { 1993 uint8_t A[16]; 1994 }; 1995 1996 ///Controller number of completed packets structure 1997 struct nb_cmpl_pk 1998 { 1999 ///Connection handle 2000 uint16_t con_hdl; 2001 ///Controller number of data packets that have been completed since last time 2002 uint16_t nb_hc_cmpl_pkts; 2003 }; 2004 2005 ///Supported Features structure 2006 struct features 2007 { 2008 ///8-byte array for features 2009 uint8_t feats[FEATS_LEN]; 2010 }; 2011 2012 ///Supported commands structure 2013 struct supp_cmds 2014 { 2015 ///64-byte array for supported commands 2016 uint8_t cmds[SUPP_CMDS_LEN]; 2017 }; 2018 2019 ///Supported LMP features structure 2020 struct lmp_features 2021 { 2022 ///8-byte array for LMp features 2023 uint8_t feats[FEATS_LEN]; 2024 }; 2025 2026 ///Simple pairing IO capabilities 2027 struct io_capability 2028 { 2029 ///IO capability 2030 uint8_t io_cap; 2031 /// Out Of Band Data present 2032 bool oob_data_present; 2033 ///Authentication Requirement 2034 uint8_t aut_req; 2035 }; 2036 2037 ///Public key 2038 struct pub_key_192 2039 { 2040 uint8_t p_key[PUB_KEY_192_LEN/2]; 2041 }; 2042 2043 ///Public key 2044 struct pub_key_256 2045 { 2046 uint8_t p_key[PUB_KEY_256_LEN/2]; 2047 }; 2048 2049 ///Simple pairing public keys 192 2050 struct sp_pub_key_192 2051 { 2052 ///Public key X 2053 struct pub_key_192 X; 2054 ///Public key Y 2055 struct pub_key_192 Y; 2056 }; 2057 2058 ///Simple pairing public keys 256 2059 struct sp_pub_key_256 2060 { 2061 ///Public key X 2062 struct pub_key_256 X; 2063 ///Public key Y 2064 struct pub_key_256 Y; 2065 }; 2066 2067 ///Supported LE states structure 2068 struct le_states 2069 { 2070 ///8-byte array for LE states 2071 uint8_t supp_states[LE_STATES_LEN]; 2072 }; 2073 2074 ///White List element structure 2075 struct white_list 2076 { 2077 ///BD address of device entry 2078 struct bd_addr wl_bdaddr; 2079 ///BD address type of device entry 2080 uint8_t wl_bdaddr_type; 2081 }; 2082 2083 ///CRC initial value structure 2084 struct crc_init 2085 { 2086 ///3-byte array CRC initial value 2087 uint8_t crc[CRC_INIT_LEN]; 2088 }; 2089 2090 ///Session key diversifier master or slave structure 2091 struct sess_k_div_x 2092 { 2093 ///8-byte array for diversifier value 2094 uint8_t skdiv[SESS_KEY_DIV_LEN]; 2095 }; 2096 2097 ///Session key diversifier structure 2098 struct sess_k_div 2099 { 2100 ///16-byte array for session key diversifier. 2101 uint8_t skd[2*SESS_KEY_DIV_LEN]; 2102 }; 2103 2104 ///Initiator vector 2105 struct init_vect 2106 { 2107 ///4-byte array for vector 2108 uint8_t iv[INIT_VECT_LEN]; 2109 }; 2110 2111 typedef struct t_public_key 2112 { 2113 uint8_t x[PUBLIC_KEY_P256_LEN]; 2114 uint8_t y[PUBLIC_KEY_P256_LEN]; 2115 2116 } t_public_key; 2117 2118 2119 /// @} CO_BT_DEFINES 2120 #endif // CO_BT_DEFINES_H_ 2121