Home
last modified time | relevance | path

Searched defs:CCR (Results 1 – 25 of 689) sorted by relevance

12345678910>>...28

/bsp/yichip/yc3121-pos/Libraries/core/
A Dmisc.c28 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
/bsp/mm32f327x/Libraries/MM32F327x/Include/
A Dreg_spi.h92 …__IO u32 CCR; ///< SPI common contro… member
123 …__IO u32 CCR; ///< SPI common contro… member
A Dreg_flash.h105 …__IO u32 CCR; ///< Configuration and… member
A Dreg_uart.h75 …__IO u32 CCR; ///< Config Control Re… member
A Dreg_dma.h67 …__IO u32 CCR; ///< DMA channel x con… member
/bsp/fujitsu/mb9x/mb9bf568r/CMSIS/Include/
A Dcore_cm0.h299 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/synwit/libraries/SWM320_CSL/CMSIS/CoreSupport/
A Dcore_cm0.h341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/efm32/Libraries/CMSIS/Include/
A Dcore_cm0.h297 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/CME_M7/CMSIS/CMSIS/Include/
A Dcore_cm0.h312 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/ft32/libraries/FT32F0xx/CMSIS/FT32F0xx/Include/
A Dcore_cm0.h332 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/fujitsu/mb9x/mb9bf618s/CMSIS/Include/
A Dcore_cm0.h312 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/samd21/sam_d2x_asflib/CMSIS/Include/
A Dcore_cm0.h341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32l07x/Libraries/CMSIS/CORE/
A Dcore_cm0.h297 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32l07x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32l3xx/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32l3xx/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h297 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/hk32/libraries/HK32F0xx_StdPeriph_Driver/CMSIS/Core/
A Dcore_cm0.h312 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/nxp/lpc/lpc43xx/Libraries/CMSIS/Include/
A Dcore_cm0.h312 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32f103x/Libraries/CMSIS/IAR_CORE/
A Dcore_cm0.h331 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/mm32f103x/Libraries/CMSIS/KEIL_CORE/
A Dcore_cm0.h287 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/wch/arm/ch579m/libraries/CMSIS/Include/
A Dcore_cm0.h341 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/xplorer4330/Libraries/CMSIS/Include/
A Dcore_cm0.h312 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/essemi/es32f0654/libraries/CMSIS/Include/
A Dcore_cm0.h298 …__IO uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register … member
/bsp/acm32/acm32f0x0-nucleo/libraries/CMSIS/
A Dcore_cm0.h396 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
/bsp/mm32f327x/Libraries/CMSIS/IAR_Core/
A Dcore_cm0.h336 … __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member

Completed in 84 milliseconds

12345678910>>...28