Searched defs:CLK (Results 1 – 13 of 13) sorted by relevance
183 #define IS_SCI_CLK(CLK) ((CLK == SCI_CLK_HIGH) || \ argument
185 #define IS_RCC_CLOCKTYPE(CLK) ((((CLK) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) || \ argument
129 uint32_t CLK:3; /*!< bit: 18..20 MDC CLock Division */ member
363 …__IOM uint32_t CLK; /*!< (@ 0x00000018) ISO7816 clock divider control re… member
257 … uint32_t CLK:3; /**< bit: 18..20 MDC CLock Division */ member
1199 __IO uint32_t CLK; member
385 …__IO uint32_t CLK; /*!< ISO7816 x clock divider register, Address offs… member
11546 #define CLK(mux, div) \ macro
8126 …__IOM uint32_t CLK : 2; /*!< [13..12] CTSU Operating Clock Select … member
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