1 /** 2 ****************************************************************************** 3 * @file ft32f0xx_crs.c 4 * @author FMD AE 5 * @brief This file provides firmware functions to manage the following 6 * functionalities of CRS peripheral : 7 * + Configuration of the CRS peripheral 8 * + Interrupts and flags management 9 * @version V1.0.0 10 * @data 2021-07-01 11 ****************************************************************************** 12 */ 13 14 15 /* Includes ------------------------------------------------------------------*/ 16 #include "ft32f0xx_crs.h" 17 #include "ft32f0xx_rcc.h" 18 19 20 /** @defgroup CRS 21 * @brief CRS driver modules 22 * @{ 23 */ 24 25 /* CRS Flag Mask */ 26 #define FLAG_MASK ((uint32_t)0x700) 27 28 29 /** 30 * @brief Deinitializes CRS peripheral registers to their default reset values. 31 * @param None 32 * @retval None 33 */ CRS_DeInit(void)34void CRS_DeInit(void) 35 { 36 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, ENABLE); 37 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CRS, DISABLE); 38 } 39 40 /** 41 * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value. 42 * @note The calibration is used to compensate for the variations in voltage 43 * and temperature that influence the frequency of the internal HSI48 RC. 44 * @note This function can be called only when the AUTOTRIMEN bit is reset. 45 * @param CRS_HSI48CalibrationValue: 46 * @retval None 47 */ CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue)48void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue) 49 { 50 /* Clear TRIM[5:0] bits */ 51 CRS->CR &= ~CRS_CR_TRIM; 52 53 /* Set the TRIM[5:0] bits according to CRS_HSI48CalibrationValue value */ 54 CRS->CR |= (uint32_t)((uint32_t)CRS_HSI48CalibrationValue << 8); 55 56 } 57 58 /** 59 * @brief Enables or disables the oscillator clock for frequency error counter. 60 * @note when the CEN bit is set the CRS_CFGR register becomes write-protected. 61 * @param NewState: new state of the frequency error counter. 62 * This parameter can be: ENABLE or DISABLE. 63 * @retval None 64 */ CRS_FrequencyErrorCounterCmd(FunctionalState NewState)65void CRS_FrequencyErrorCounterCmd(FunctionalState NewState) 66 { 67 assert_param(IS_FUNCTIONAL_STATE(NewState)); 68 69 if (NewState != DISABLE) 70 { 71 CRS->CR |= CRS_CR_CEN; 72 } 73 else 74 { 75 CRS->CR &= ~CRS_CR_CEN; 76 } 77 } 78 79 /** 80 * @brief Enables or disables the automatic hardware adjustement of TRIM bits. 81 * @note When the AUTOTRIMEN bit is set the CRS_CFGR register becomes write-protected. 82 * @param NewState: new state of the automatic trimming. 83 * This parameter can be: ENABLE or DISABLE. 84 * @retval None 85 */ CRS_AutomaticCalibrationCmd(FunctionalState NewState)86void CRS_AutomaticCalibrationCmd(FunctionalState NewState) 87 { 88 assert_param(IS_FUNCTIONAL_STATE(NewState)); 89 90 if (NewState != DISABLE) 91 { 92 CRS->CR |= CRS_CR_AUTOTRIMEN; 93 } 94 else 95 { 96 CRS->CR &= ~CRS_CR_AUTOTRIMEN; 97 } 98 } 99 100 /** 101 * @brief Generate the software synchronization event 102 * @param None 103 * @retval None 104 */ CRS_SoftwareSynchronizationGenerate(void)105void CRS_SoftwareSynchronizationGenerate(void) 106 { 107 CRS->CR |= CRS_CR_SWSYNC; 108 } 109 110 /** 111 * @brief Adjusts the Internal High Speed 48 oscillator (HSI 48) calibration value. 112 * @note The calibration is used to compensate for the variations in voltage 113 * and temperature that influence the frequency of the internal HSI48 RC. 114 * @note This function can be called only when the CEN bit is reset. 115 * @param CRS_ReloadValue: specifies the HSI calibration trimming value. 116 * This parameter must be a number between 0 and . 117 * @retval None 118 */ CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue)119void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue) 120 { 121 122 /* Clear RELOAD[15:0] bits */ 123 CRS->CFGR &= ~CRS_CFGR_RELOAD; 124 125 /* Set the RELOAD[15:0] bits according to CRS_ReloadValue value */ 126 CRS->CFGR |= (uint32_t)CRS_ReloadValue; 127 128 } 129 130 /** 131 * @brief 132 * @note This function can be called only when the CEN bit is reset. 133 * @param CRS_ErrorLimitValue: specifies the HSI calibration trimming value. 134 * This parameter must be a number between 0 and . 135 * @retval None 136 */ CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue)137void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue) 138 { 139 /* Clear FELIM[7:0] bits */ 140 CRS->CFGR &= ~CRS_CFGR_FELIM; 141 142 /* Set the FELIM[7:0] bits according to CRS_ErrorLimitValue value */ 143 CRS->CFGR |= (uint32_t)(CRS_ErrorLimitValue <<16); 144 } 145 146 /** 147 * @brief 148 * @note This function can be called only when the CEN bit is reset. 149 * @param CRS_Prescaler: specifies the HSI calibration trimming value. 150 * This parameter can be one of the following values: 151 * @arg CRS_SYNC_Div1: 152 * @arg CRS_SYNC_Div2: 153 * @arg CRS_SYNC_Div4: 154 * @arg CRS_SYNC_Div8: 155 * @arg CRS_SYNC_Div16: 156 * @arg CRS_SYNC_Div32: 157 * @arg CRS_SYNC_Div64: 158 * @arg CRS_SYNC_Div128: 159 * @retval None 160 */ CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler)161void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler) 162 { 163 /* Check the parameters */ 164 assert_param(IS_CRS_SYNC_DIV(CRS_Prescaler)); 165 166 /* Clear SYNCDIV[2:0] bits */ 167 CRS->CFGR &= ~CRS_CFGR_SYNCDIV; 168 169 /* Set the CRS_CFGR_SYNCDIV[2:0] bits according to CRS_Prescaler value */ 170 CRS->CFGR |= CRS_Prescaler; 171 } 172 173 /** 174 * @brief 175 * @note This function can be called only when the CEN bit is reset. 176 * @param CRS_Source: . 177 * This parameter can be one of the following values: 178 * @arg CRS_SYNCSource_GPIO: 179 * @arg CRS_SYNCSource_LSE: 180 * @arg CRS_SYNCSource_USB: 181 * @retval None 182 */ CRS_SynchronizationSourceConfig(uint32_t CRS_Source)183void CRS_SynchronizationSourceConfig(uint32_t CRS_Source) 184 { 185 /* Check the parameters */ 186 assert_param(IS_CRS_SYNC_SOURCE(CRS_Source)); 187 188 /* Clear SYNCSRC[1:0] bits */ 189 CRS->CFGR &= ~CRS_CFGR_SYNCSRC; 190 191 /* Set the SYNCSRC[1:0] bits according to CRS_Source value */ 192 CRS->CFGR |= CRS_Source; 193 } 194 195 /** 196 * @brief 197 * @note This function can be called only when the CEN bit is reset. 198 * @param CRS_Polarity: . 199 * This parameter can be one of the following values: 200 * @arg CRS_SYNCPolarity_Rising: 201 * @arg CRS_SYNCPolarity_Falling: 202 * @retval None 203 */ CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity)204void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity) 205 { 206 /* Check the parameters */ 207 assert_param(IS_CRS_SYNC_POLARITY(CRS_Polarity)); 208 209 /* Clear SYNCSPOL bit */ 210 CRS->CFGR &= ~CRS_CFGR_SYNCPOL; 211 212 /* Set the SYNCSPOL bits according to CRS_Polarity value */ 213 CRS->CFGR |= CRS_Polarity; 214 } 215 216 /** 217 * @brief Returns the Relaod value. 218 * @param None 219 * @retval The reload value 220 */ CRS_GetReloadValue(void)221uint32_t CRS_GetReloadValue(void) 222 { 223 return ((uint32_t)(CRS->CFGR & CRS_CFGR_RELOAD)); 224 } 225 226 /** 227 * @brief Returns the HSI48 Calibration value. 228 * @param None 229 * @retval The reload value 230 */ CRS_GetHSI48CalibrationValue(void)231uint32_t CRS_GetHSI48CalibrationValue(void) 232 { 233 return (((uint32_t)(CRS->CR & CRS_CR_TRIM)) >> 8); 234 } 235 236 /** 237 * @brief Returns the frequency error capture. 238 * @param None 239 * @retval The frequency error capture value 240 */ CRS_GetFrequencyErrorValue(void)241uint32_t CRS_GetFrequencyErrorValue(void) 242 { 243 return ((uint32_t)(CRS->ISR & CRS_ISR_FECAP)); 244 } 245 246 /** 247 * @brief Returns the frequency error direction. 248 * @param None 249 * @retval The frequency error direction. The returned value can be one 250 * of the following values: 251 * - 0x00: Up counting 252 * - 0x8000: Down counting 253 */ CRS_GetFrequencyErrorDirection(void)254uint32_t CRS_GetFrequencyErrorDirection(void) 255 { 256 return ((uint32_t)(CRS->ISR & CRS_ISR_FEDIR)); 257 } 258 259 260 /** 261 * @brief Enables or disables the specified CRS interrupts. 262 * @param CRS_IT: specifies the RCC interrupt sources to be enabled or disabled. 263 * This parameter can be any combination of the following values: 264 * @arg CRS_IT_SYNCOK: 265 * @arg CRS_IT_SYNCWARN: 266 * @arg CRS_IT_ERR: 267 * @arg CRS_IT_ESYNC: 268 * @param NewState: new state of the specified CRS interrupts. 269 * This parameter can be: ENABLE or DISABLE. 270 * @retval None 271 */ CRS_ITConfig(uint32_t CRS_IT,FunctionalState NewState)272void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState) 273 { 274 /* Check the parameters */ 275 assert_param(IS_CRS_IT(CRS_IT)); 276 assert_param(IS_FUNCTIONAL_STATE(NewState)); 277 278 if (NewState != DISABLE) 279 { 280 CRS->CR |= CRS_IT; 281 } 282 else 283 { 284 CRS->CR &= ~CRS_IT; 285 } 286 } 287 288 /** 289 * @brief Checks whether the specified CRS flag is set or not. 290 * @param CRS_FLAG: specifies the flag to check. 291 * This parameter can be one of the following values: 292 * @arg CRS_FLAG_SYNCOK: 293 * @arg CRS_FLAG_SYNCWARN: 294 * @arg CRS_FLAG_ERR: 295 * @arg CRS_FLAG_ESYNC: 296 * @arg CRS_FLAG_TRIMOVF: 297 * @arg CRS_FLAG_SYNCERR: 298 * @arg CRS_FLAG_SYNCMISS: 299 * @retval The new state of CRS_FLAG (SET or RESET). 300 */ CRS_GetFlagStatus(uint32_t CRS_FLAG)301FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG) 302 { 303 /* Check the parameters */ 304 assert_param(IS_CRS_FLAG(CRS_FLAG)); 305 306 return ((FlagStatus)(CRS->ISR & CRS_FLAG)); 307 } 308 309 /** 310 * @brief Clears the CRS specified FLAG. 311 * @param CRS_FLAG: specifies the flag to check. 312 * This parameter can be one of the following values: 313 * @arg CRS_FLAG_SYNCOK: 314 * @arg CRS_FLAG_SYNCWARN: 315 * @arg CRS_FLAG_ERR: 316 * @arg CRS_FLAG_ESYNC: 317 * @arg CRS_FLAG_TRIMOVF: 318 * @arg CRS_FLAG_SYNCERR: 319 * @arg CRS_FLAG_SYNCMISS: 320 * @retval None 321 */ CRS_ClearFlag(uint32_t CRS_FLAG)322void CRS_ClearFlag(uint32_t CRS_FLAG) 323 { 324 /* Check the parameters */ 325 assert_param(IS_CRS_FLAG(CRS_FLAG)); 326 327 if ((CRS_FLAG & FLAG_MASK)!= 0) 328 { 329 CRS->ICR |= CRS_ICR_ERRC; 330 } 331 else 332 { 333 CRS->ICR |= CRS_FLAG; 334 } 335 } 336 337 /** 338 * @brief Checks whether the specified CRS IT pending bit is set or not. 339 * @param CRS_IT: specifies the IT pending bit to check. 340 * This parameter can be one of the following values: 341 * @arg CRS_IT_SYNCOK: 342 * @arg CRS_IT_SYNCWARN: 343 * @arg CRS_IT_ERR: 344 * @arg CRS_IT_ESYNC: 345 * @arg CRS_IT_TRIMOVF: 346 * @arg CRS_IT_SYNCERR: 347 * @arg CRS_IT_SYNCMISS: 348 * @retval The new state of CRS_IT (SET or RESET). 349 */ CRS_GetITStatus(uint32_t CRS_IT)350ITStatus CRS_GetITStatus(uint32_t CRS_IT) 351 { 352 /* Check the parameters */ 353 assert_param(IS_CRS_GET_IT(CRS_IT)); 354 355 return ((ITStatus)(CRS->ISR & CRS_IT)); 356 } 357 358 /** 359 * @brief Clears the CRS specified IT pending bi. 360 * @param CRS_FLAG: specifies the IT pending bi to clear. 361 * This parameter can be one of the following values: 362 * @arg CRS_IT_SYNCOK: 363 * @arg CRS_IT_SYNCWARN: 364 * @arg CRS_IT_ERR: 365 * @arg CRS_IT_ESYNC: 366 * @arg CRS_IT_TRIMOVF: 367 * @arg CRS_IT_SYNCERR: 368 * @arg CRS_IT_SYNCMISS: 369 * @retval None 370 */ CRS_ClearITPendingBit(uint32_t CRS_IT)371void CRS_ClearITPendingBit(uint32_t CRS_IT) 372 { 373 /* Check the parameters */ 374 assert_param(IS_CRS_CLEAR_IT(CRS_IT)); 375 376 if ((CRS_IT & FLAG_MASK)!= 0) 377 { 378 CRS->ICR |= CRS_ICR_ERRC; 379 } 380 else 381 { 382 CRS->ICR |= CRS_IT; 383 } 384 } 385 /** 386 * @} 387 */ 388 389 /** 390 * @} 391 */ 392 393 /** 394 * @} 395 */ 396 397 /** 398 * @} 399 */ 400 401 /************************ (C) COPYRIGHT FMD *****END OF FILE****/ 402