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Searched defs:CTRLBASE (Results 1 – 25 of 39) sorted by relevance

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/bsp/efm32/Libraries/Device/EnergyMicro/EFM32G/Include/
A Defm32g_dma.h42 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g200f64.h292 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g210f128.h296 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g200f16.h292 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g200f32.h292 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g222f128.h298 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g222f32.h298 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g222f64.h298 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g230f128.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g230f32.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g230f64.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g232f128.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g232f32.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g232f64.h302 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g840f128.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g840f32.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g840f64.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g842f128.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g842f32.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32g842f64.h304 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
/bsp/efm32/Libraries/Device/EnergyMicro/EFM32GG/Include/
A Defm32gg_dma.h42 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32gg230f1024.h332 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32gg230f512.h332 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32gg232f1024.h332 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member
A Defm32gg330f512.h337 __IO uint32_t CTRLBASE; /**< Channel Control Data Base Pointer Register */ member

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