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Searched defs:DIVSELXSPI1 (Results 1 – 4 of 4) sorted by relevance

/bsp/renesas/rzt2m_rsk/rzt/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G074.h11665 … __IOM uint32_t DIVSELXSPI1 : 1; /*!< [14..14] Select the base clock to generate serial clock for member
A DR9A07G075.h19759 … __IOM uint32_t DIVSELXSPI1 : 1; /*!< [14..14] Select the base clock to generate serial clock for member
/bsp/renesas/rzn2l_rsk/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h25774 … __IOM uint32_t DIVSELXSPI1 : 1; /*!< [14..14] Select the base clock to generate serial clock for member
/bsp/renesas/rzn2l_etherkit/rzn/fsp/src/bsp/cmsis/Device/RENESAS/Include/
A DR9A07G084.h25774 … __IOM uint32_t DIVSELXSPI1 : 1; /*!< [14..14] Select the base clock to generate serial clock for member

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