1 //#############################################################################
2 //
3 // FILE: device.c
4 //
5 // TITLE: Device setup for examples.
6 //
7 //#############################################################################
8 // $TI Release: F2837xD Support Library v3.05.00.00 $
9 // $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
10 // $Copyright:
11 // Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
12 //
13 // Redistribution and use in source and binary forms, with or without
14 // modification, are permitted provided that the following conditions
15 // are met:
16 //
17 // Redistributions of source code must retain the above copyright
18 // notice, this list of conditions and the following disclaimer.
19 //
20 // Redistributions in binary form must reproduce the above copyright
21 // notice, this list of conditions and the following disclaimer in the
22 // documentation and/or other materials provided with the
23 // distribution.
24 //
25 // Neither the name of Texas Instruments Incorporated nor the names of
26 // its contributors may be used to endorse or promote products derived
27 // from this software without specific prior written permission.
28 //
29 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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39 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 // $
41 //#############################################################################
42
43 //
44 // Included Files
45 //
46 #include "device.h"
47 #include "driverlib.h"
48 #ifdef __cplusplus
49 using std::memcpy;
50 #endif
51
52 //*****************************************************************************
53 //
54 // Function to initialize the device. Primarily initializes system control to a
55 // known state by disabling the watchdog, setting up the SYSCLKOUT frequency,
56 // and enabling the clocks to the peripherals.
57 //
58 //*****************************************************************************
Device_init(void)59 void Device_init(void)
60 {
61 //
62 // Disable the watchdog
63 //
64 SysCtl_disableWatchdog();
65
66 #ifdef _FLASH
67 //
68 // Copy time critical code and flash setup code to RAM. This includes the
69 // following functions: InitFlash();
70 //
71 // The RamfuncsLoadStart, RamfuncsLoadSize, and RamfuncsRunStart symbols
72 // are created by the linker. Refer to the device .cmd file.
73 //
74 memcpy(&RamfuncsRunStart, &RamfuncsLoadStart, (size_t)&RamfuncsLoadSize);
75
76 //
77 // Call Flash Initialization to setup flash waitstates. This function must
78 // reside in RAM.
79 //
80 Flash_initModule(FLASH0CTRL_BASE, FLASH0ECC_BASE, DEVICE_FLASH_WAITSTATES);
81 #endif
82 #ifdef CPU1
83 //
84 // Set up PLL control and clock dividers
85 //
86 SysCtl_setClock(DEVICE_SETCLOCK_CFG);
87
88 //
89 // Make sure the LSPCLK divider is set to the default (divide by 4)
90 //
91 SysCtl_setLowSpeedClock(SYSCTL_LSPCLK_PRESCALE_4);
92
93 //
94 // These asserts will check that the #defines for the clock rates in
95 // device.h match the actual rates that have been configured. If they do
96 // not match, check that the calculations of DEVICE_SYSCLK_FREQ and
97 // DEVICE_LSPCLK_FREQ are accurate. Some examples will not perform as
98 // expected if these are not correct.
99 //
100 ASSERT(SysCtl_getClock(DEVICE_OSCSRC_FREQ) == DEVICE_SYSCLK_FREQ);
101 ASSERT(SysCtl_getLowSpeedClock(DEVICE_OSCSRC_FREQ) == DEVICE_LSPCLK_FREQ);
102 #endif
103 //
104 // Turn on all peripherals
105 //
106 Device_enableAllPeripherals();
107 }
108
109 //*****************************************************************************
110 //
111 // Function to turn on all peripherals, enabling reads and writes to the
112 // peripherals' registers.
113 //
114 // Note that to reduce power, unused peripherals should be disabled.
115 //
116 //*****************************************************************************
Device_enableAllPeripherals(void)117 void Device_enableAllPeripherals(void)
118 {
119 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CLA1);
120 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DMA);
121 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER0);
122 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER1);
123 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TIMER2);
124 #ifdef CPU1
125 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_HRPWM);
126 #endif
127 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);
128 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_GTBCLKSYNC);
129
130 #ifdef CPU1
131 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF1);
132 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EMIF2);
133 #endif
134
135 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM1);
136 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM2);
137 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM3);
138 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM4);
139 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM5);
140 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM6);
141 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM7);
142 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM8);
143 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM9);
144 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM10);
145 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM11);
146 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EPWM12);
147
148 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP1);
149 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP2);
150 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP3);
151 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP4);
152 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP5);
153 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ECAP6);
154
155 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP1);
156 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP2);
157 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_EQEP3);
158
159 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD1);
160 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SD2);
161
162 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIA);
163 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIB);
164 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCIC);
165 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SCID);
166
167 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIA);
168 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIB);
169 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_SPIC);
170
171 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CA);
172 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_I2CB);
173
174 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANA);
175 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CANB);
176
177 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPA);
178 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_MCBSPB);
179
180 #ifdef CPU1
181 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_USBA);
182
183 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_UPPA);
184 #endif
185
186 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCA);
187 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCB);
188 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCC);
189 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_ADCD);
190
191 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS1);
192 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS2);
193 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS3);
194 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS4);
195 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS5);
196 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS6);
197 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS7);
198 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_CMPSS8);
199
200 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACA);
201 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACB);
202 SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_DACC);
203 }
204
205 //*****************************************************************************
206 //
207 // Function to disable pin locks on GPIOs.
208 //
209 //*****************************************************************************
Device_initGPIO(void)210 void Device_initGPIO(void)
211 {
212 //
213 // Disable pin locks.
214 //
215 GPIO_unlockPortConfig(GPIO_PORT_A, 0xFFFFFFFF);
216 GPIO_unlockPortConfig(GPIO_PORT_B, 0xFFFFFFFF);
217 GPIO_unlockPortConfig(GPIO_PORT_C, 0xFFFFFFFF);
218 GPIO_unlockPortConfig(GPIO_PORT_D, 0xFFFFFFFF);
219 GPIO_unlockPortConfig(GPIO_PORT_E, 0xFFFFFFFF);
220 GPIO_unlockPortConfig(GPIO_PORT_F, 0xFFFFFFFF);
221
222 //
223 // Enable GPIO Pullups
224 //
225 Device_enableUnbondedGPIOPullups();
226 }
227
228 //*****************************************************************************
229 //
230 // Function to enable pullups for the unbonded GPIOs on the 176PTP package:
231 // GPIOs Grp Bits
232 // 95-132 C 31
233 // D 31:0
234 // E 4:0
235 // 134-168 E 31:6
236 // F 8:0
237 //
238 //*****************************************************************************
239
Device_enableUnbondedGPIOPullupsFor176Pin(void)240 void Device_enableUnbondedGPIOPullupsFor176Pin(void)
241 {
242 EALLOW;
243 HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0x80000000U;
244 HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
245 HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFDFU;
246 HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
247 EDIS;
248 }
249
250 //*****************************************************************************
251 //
252 // Function to enable pullups for the unbonded GPIOs on the 100PZ package:
253 // GPIOs Grp Bits
254 // 0-1 A 1:0
255 // 5-9 A 9:5
256 // 22-40 A 31:22
257 // B 8:0
258 // 44-57 B 25:12
259 // 67-68 C 4:3
260 // 74-77 C 13:10
261 // 79-83 C 19:15
262 // 93-168 C 31:29
263 // D 31:0
264 // E 31:0
265 // F 8:0
266 //
267 //*****************************************************************************
Device_enableUnbondedGPIOPullupsFor100Pin(void)268 void Device_enableUnbondedGPIOPullupsFor100Pin(void)
269 {
270 EALLOW;
271 HWREG(GPIOCTRL_BASE + GPIO_O_GPAPUD) = ~0xFFC003E3U;
272 HWREG(GPIOCTRL_BASE + GPIO_O_GPBPUD) = ~0x03FFF1FFU;
273 HWREG(GPIOCTRL_BASE + GPIO_O_GPCPUD) = ~0xE10FBC18U;
274 HWREG(GPIOCTRL_BASE + GPIO_O_GPDPUD) = ~0xFFFFFFF7U;
275 HWREG(GPIOCTRL_BASE + GPIO_O_GPEPUD) = ~0xFFFFFFFFU;
276 HWREG(GPIOCTRL_BASE + GPIO_O_GPFPUD) = ~0x000001FFU;
277 EDIS;
278 }
279
280 //*****************************************************************************
281 //
282 // Function to enable pullups for the unbonded GPIOs on the 100PZ or
283 // 176PTP package.
284 //
285 //*****************************************************************************
Device_enableUnbondedGPIOPullups(void)286 void Device_enableUnbondedGPIOPullups(void)
287 {
288 //
289 // bits 8-10 have pin count
290 //
291 uint16_t pinCount = ((HWREG(DEVCFG_BASE + SYSCTL_O_PARTIDL) &
292 (uint32_t)SYSCTL_PARTIDL_PIN_COUNT_M) >>
293 SYSCTL_PARTIDL_PIN_COUNT_S);
294
295 /*
296 * 5 = 100 pin
297 * 6 = 176 pin
298 * 7 = 337 pin
299 */
300 if(pinCount == 5)
301 {
302 Device_enableUnbondedGPIOPullupsFor100Pin();
303 }
304 else if(pinCount == 6)
305 {
306 Device_enableUnbondedGPIOPullupsFor176Pin();
307 }
308 else
309 {
310 //
311 // Do nothing - this is 337 pin package
312 //
313 }
314 }
315
316 //*****************************************************************************
317 //
318 // Error handling function to be called when an ASSERT is violated
319 //
320 //*****************************************************************************
__error__(char * filename,uint32_t line)321 void __error__(char *filename, uint32_t line)
322 {
323 //
324 // An ASSERT condition was evaluated as false. You can use the filename and
325 // line parameters to determine what went wrong.
326 //
327 ESTOP0;
328 }
329