1 /**
2 *******************************************************************************************************
3 * @file fm33lc0xx_fl_rng.h
4 * @author FMSH Application Team
5 * @brief Head file of RNG FL Module
6 *******************************************************************************************************
7 * @attention
8 *
9 * Copyright (c) [2021] [Fudan Microelectronics]
10 * THIS SOFTWARE is licensed under Mulan PSL v2.
11 * You can use this software according to the terms and conditions of the Mulan PSL v2.
12 * You may obtain a copy of Mulan PSL v2 at:
13 * http://license.coscl.org.cn/MulanPSL2
14 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
15 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
16 * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
17 * See the Mulan PSL v2 for more details.
18 *
19 *******************************************************************************************************
20 */
21
22
23 /* Define to prevent recursive inclusion---------------------------------------------------------------*/
24 #ifndef __FM33LC0XX_FL_RNG_H
25 #define __FM33LC0XX_FL_RNG_H
26
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 /* Includes -------------------------------------------------------------------------------------------*/
31 #include "fm33lc0xx_fl_def.h"
32 /** @addtogroup FM33LC0XX_FL_Driver
33 * @{
34 */
35
36 /** @defgroup RNG RNG
37 * @brief RNG FL driver
38 * @{
39 */
40
41 /* Exported types -------------------------------------------------------------------------------------*/
42 /** @defgroup RNG_FL_ES_INIT RNG Exported Init structures
43 * @{
44 */
45
46 /**
47 * @brief RNG Init Sturcture definition
48 */
49
50 /**
51 * @}
52 */
53 /* Exported constants ---------------------------------------------------------------------------------*/
54 /** @defgroup RNG_FL_Exported_Constants RNG Exported Constants
55 * @{
56 */
57
58 #define RNG_CR_EN_Pos (0U)
59 #define RNG_CR_EN_Msk (0x1U << RNG_CR_EN_Pos)
60 #define RNG_CR_EN RNG_CR_EN_Msk
61
62 #define RNG_SR_RBUSY_Pos (1U)
63 #define RNG_SR_RBUSY_Msk (0x1U << RNG_SR_RBUSY_Pos)
64 #define RNG_SR_RBUSY RNG_SR_RBUSY_Msk
65
66 #define RNG_SR_RNF_Pos (0U)
67 #define RNG_SR_RNF_Msk (0x1U << RNG_SR_RNF_Pos)
68 #define RNG_SR_RNF RNG_SR_RNF_Msk
69
70 #define RNG_CRCCR_CRCEN_Pos (0U)
71 #define RNG_CRCCR_CRCEN_Msk (0x1U << RNG_CRCCR_CRCEN_Pos)
72 #define RNG_CRCCR_CRCEN RNG_CRCCR_CRCEN_Msk
73
74 #define RNG_CRCSR_CRCDONE_Pos (0U)
75 #define RNG_CRCSR_CRCDONE_Msk (0x1U << RNG_CRCSR_CRCDONE_Pos)
76 #define RNG_CRCSR_CRCDONE RNG_CRCSR_CRCDONE_Msk
77
78
79
80
81
82
83 /**
84 * @}
85 */
86 /* Exported functions ---------------------------------------------------------------------------------*/
87 /** @defgroup RNG_FL_Exported_Functions RNG Exported Functions
88 * @{
89 */
90
91 /**
92 * @brief RNG enable
93 * @rmtoll CR EN FL_RNG_Enable
94 * @param RNGCTLx RNGCTL instance
95 * @retval None
96 */
FL_RNG_Enable(RNGCTL_Type * RNGCTLx)97 __STATIC_INLINE void FL_RNG_Enable(RNGCTL_Type *RNGCTLx)
98 {
99 SET_BIT(RNGCTLx->CR, RNG_CR_EN_Msk);
100 }
101
102 /**
103 * @brief RNG enable status
104 * @rmtoll CR EN FL_RNG_IsEnabled
105 * @param RNGCTLx RNGCTL instance
106 * @retval State of bit (1 or 0).
107 */
FL_RNG_IsEnabled(RNGCTL_Type * RNGCTLx)108 __STATIC_INLINE uint32_t FL_RNG_IsEnabled(RNGCTL_Type *RNGCTLx)
109 {
110 return (uint32_t)(READ_BIT(RNGCTLx->CR, RNG_CR_EN_Msk) == RNG_CR_EN_Msk);
111 }
112
113 /**
114 * @brief RNG disable
115 * @rmtoll CR EN FL_RNG_Disable
116 * @param RNGCTLx RNGCTL instance
117 * @retval None
118 */
FL_RNG_Disable(RNGCTL_Type * RNGCTLx)119 __STATIC_INLINE void FL_RNG_Disable(RNGCTL_Type *RNGCTLx)
120 {
121 CLEAR_BIT(RNGCTLx->CR, RNG_CR_EN_Msk);
122 }
123
124 /**
125 * @brief Read RNG output data register
126 * @rmtoll DOR FL_RNG_ReadData
127 * @param RNGx RNG instance
128 * @retval
129 */
FL_RNG_ReadData(RNG_Type * RNGx)130 __STATIC_INLINE uint32_t FL_RNG_ReadData(RNG_Type *RNGx)
131 {
132 return (uint32_t)(READ_BIT(RNGx->DOR, (0xffffffffU << 0U)) >> 0U);
133 }
134
135 /**
136 * @brief Get LFSR Flag
137 * @rmtoll SR RBUSY FL_RNG_IsActiveFlag_Busy
138 * @param RNGx RNG instance
139 * @retval State of bit (1 or 0).
140 */
FL_RNG_IsActiveFlag_Busy(RNG_Type * RNGx)141 __STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_Busy(RNG_Type *RNGx)
142 {
143 return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RBUSY_Msk) == (RNG_SR_RBUSY_Msk));
144 }
145
146 /**
147 * @brief Get random number fail flag
148 * @rmtoll SR RNF FL_RNG_IsActiveFlag_RandomFail
149 * @param RNGx RNG instance
150 * @retval State of bit (1 or 0).
151 */
FL_RNG_IsActiveFlag_RandomFail(RNG_Type * RNGx)152 __STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_RandomFail(RNG_Type *RNGx)
153 {
154 return (uint32_t)(READ_BIT(RNGx->SR, RNG_SR_RNF_Msk) == (RNG_SR_RNF_Msk));
155 }
156
157 /**
158 * @brief Clear random number fail flag
159 * @rmtoll SR RNF FL_RNG_ClearFlag_RandomFail
160 * @param RNGx RNG instance
161 * @retval None
162 */
FL_RNG_ClearFlag_RandomFail(RNG_Type * RNGx)163 __STATIC_INLINE void FL_RNG_ClearFlag_RandomFail(RNG_Type *RNGx)
164 {
165 WRITE_REG(RNGx->SR, RNG_SR_RNF_Msk);
166 }
167
168 /**
169 * @brief CRC enable
170 * @rmtoll CRCCR CRCEN FL_RNG_CRC_Enable
171 * @param RNGx RNG instance
172 * @retval None
173 */
FL_RNG_CRC_Enable(RNG_Type * RNGx)174 __STATIC_INLINE void FL_RNG_CRC_Enable(RNG_Type *RNGx)
175 {
176 SET_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk);
177 }
178
179 /**
180 * @brief Get CRC enable status
181 * @rmtoll CRCCR CRCEN FL_RNG_CRC_IsEnabled
182 * @param RNGx RNG instance
183 * @retval State of bit (1 or 0).
184 */
FL_RNG_CRC_IsEnabled(RNG_Type * RNGx)185 __STATIC_INLINE uint32_t FL_RNG_CRC_IsEnabled(RNG_Type *RNGx)
186 {
187 return (uint32_t)(READ_BIT(RNGx->CRCCR, RNG_CRCCR_CRCEN_Msk) == RNG_CRCCR_CRCEN_Msk);
188 }
189
190 /**
191 * @brief Write CRC data input
192 * @rmtoll CRCDIR FL_RNG_CRC_WriteData
193 * @param RNGx RNG instance
194 * @param data
195 * @retval None
196 */
FL_RNG_CRC_WriteData(RNG_Type * RNGx,uint32_t data)197 __STATIC_INLINE void FL_RNG_CRC_WriteData(RNG_Type *RNGx, uint32_t data)
198 {
199 MODIFY_REG(RNGx->CRCDIR, (0xffffffffU << 0U), (data << 0U));
200 }
201
202 /**
203 * @brief Get CRC calculation done Flag
204 * @rmtoll CRCSR CRCDONE FL_RNG_IsActiveFlag_CRCComplete
205 * @param RNGx RNG instance
206 * @retval State of bit (1 or 0).
207 */
FL_RNG_IsActiveFlag_CRCComplete(RNG_Type * RNGx)208 __STATIC_INLINE uint32_t FL_RNG_IsActiveFlag_CRCComplete(RNG_Type *RNGx)
209 {
210 return (uint32_t)(READ_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk) == (RNG_CRCSR_CRCDONE_Msk));
211 }
212
213 /**
214 * @brief Clear CRC calculation done Flag
215 * @rmtoll CRCSR CRCDONE FL_RNG_ClearFlag_CRCComplete
216 * @param RNGx RNG instance
217 * @retval None
218 */
FL_RNG_ClearFlag_CRCComplete(RNG_Type * RNGx)219 __STATIC_INLINE void FL_RNG_ClearFlag_CRCComplete(RNG_Type *RNGx)
220 {
221 CLEAR_BIT(RNGx->CRCSR, RNG_CRCSR_CRCDONE_Msk);
222 }
223
224 /**
225 * @}
226 */
227
228 /** @defgroup RNG_FL_EF_Init Initialization and de-initialization functions
229 * @{
230 */
231 FL_ErrorStatus FL_RNG_DeInit(RNG_Type *RNGx);
232 FL_ErrorStatus FL_RNG_Init(RNG_Type *RNGx);
233
234 /**
235 * @}
236 */
237
238 /** @defgroup RNG_FL_EF_Operation Opeartion functions
239 * @{
240 */
241
242 uint32_t GetRandomNumber(void);
243 uint32_t GetCrc32(uint32_t dataIn);
244
245 /**
246 * @}
247 */
248
249 /**
250 * @}
251 */
252
253 /**
254 * @}
255 */
256
257 #ifdef __cplusplus
258 }
259 #endif
260
261 #endif /* __FM33LC0XX_FL_RNG_H*/
262
263 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
264 /********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
265