1 /* 2 * Copyright (c) 2006-2023, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2013-07-20 Bernard first version 9 * 2023-02-01 GuEe-GUI move macros to header 10 */ 11 12 #ifndef __PIC_GICV2_H__ 13 #define __PIC_GICV2_H__ 14 15 #include <rtdef.h> 16 17 #include <drivers/pic.h> 18 19 #define GIC_DIST_CTRL 0x000 20 #define GIC_DIST_TYPE 0x004 21 #define GIC_DIST_IIDR 0x008 22 #define GIC_DIST_IGROUP 0x080 23 #define GIC_DIST_ENABLE_SET 0x100 24 #define GIC_DIST_ENABLE_CLEAR 0x180 25 #define GIC_DIST_PENDING_SET 0x200 26 #define GIC_DIST_PENDING_CLEAR 0x280 27 #define GIC_DIST_ACTIVE_SET 0x300 28 #define GIC_DIST_ACTIVE_CLEAR 0x380 29 #define GIC_DIST_PRI 0x400 30 #define GIC_DIST_TARGET 0x800 31 #define GIC_DIST_CONFIG 0xc00 32 #define GIC_DIST_SOFTINT 0xf00 33 #define GIC_DIST_SGI_PENDING_CLEAR 0xf10 34 #define GIC_DIST_SGI_PENDING_SET 0xf20 35 #define GIC_DIST_ICPIDR2 0xfe8 36 37 #define GICD_ENABLE 0x1 38 #define GICD_DISABLE 0x0 39 #define GICD_INT_ACTLOW_LVLTRIG 0x0 40 #define GICD_INT_EN_CLR_X32 0xffffffff 41 #define GICD_INT_EN_SET_SGI 0x0000ffff 42 #define GICD_INT_EN_CLR_PPI 0xffff0000 43 44 #define GICD_GROUP0 0 45 #define GICD_GROUP1 (~GICD_GROUP0) 46 47 #define GIC_CPU_CTRL 0x00 48 #define GIC_CPU_PRIMASK 0x04 49 #define GIC_CPU_BINPOINT 0x08 50 #define GIC_CPU_INTACK 0x0c 51 #define GIC_CPU_EOI 0x10 52 #define GIC_CPU_RUNNINGPRI 0x14 53 #define GIC_CPU_HIGHPRI 0x18 54 #define GIC_CPU_ALIAS_BINPOINT 0x1c 55 #define GIC_CPU_ACTIVEPRIO 0xd0 56 #define GIC_CPU_IIDR 0xfc 57 #define GIC_CPU_DIR 0x1000 58 59 #define GICC_ENABLE 0x1 60 #define GICC_INT_PRI_THRESHOLD 0xf0 /* priority levels 16 */ 61 #define GIC_CPU_CTRL_ENABLE_GRP0 (1 << 0) 62 #define GIC_CPU_CTRL_ENABLE_GRP1 (1 << 1) 63 #define GIC_CPU_CTRL_EOI_MODE_NS (1 << 9) 64 65 struct gicv2 66 { 67 struct rt_pic parent; 68 69 int version; 70 int max_irq; 71 72 void *dist_base; 73 rt_size_t dist_size; 74 void *cpu_base; 75 rt_size_t cpu_size; 76 77 void *hyp_base; 78 rt_size_t hyp_size; 79 void *vcpu_base; 80 rt_size_t vcpu_size; 81 82 rt_bool_t skip_init; 83 }; 84 85 #endif /* __IRQ_GICV2_H__ */ 86