1 /* 2 * @ : Copyright (c) 2021 Phytium Information Technology, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0. 5 * 6 * @Date: 2021-04-27 17:55:22 7 * @LastEditTime: 2021-04-28 08:39:20 8 * @Description: This files is for 9 * 10 * @Modify History: 11 * Ver Who Date Changes 12 * ----- ------ -------- -------------------------------------- 13 */ 14 15 #ifndef FT_BSP_GPIO_HW_H 16 #define FT_BSP_GPIO_HW_H 17 18 #ifdef __cplusplus 19 extern "C" 20 { 21 #endif 22 23 #include "ft_types.h" 24 #include "ft_io.h" 25 26 #define GPIO_CTRL_ID_0 0 27 #define GPIO_CTRL_ID_1 1 28 29 /* base address of gpio register */ 30 #define GPIO_CTRL0_PA_BASE 0x28004000 31 #define GPIO_CTRL1_PA_BASE 0x28005000 32 #define GPIO_GROUPA_OFFSET 0x0 33 #define GPIO_GROUPB_OFFSET 0xc 34 35 /* offset of register map */ 36 #define GPIO_SWPORTA_DR 0x00 //A 组端口输出寄存器 37 #define GPIO_SWPORTA_DDR 0x04 //A 组端口方向控制寄存器 38 #define GPIO_EXT_PORTA 0x08 //A 组端口输入寄存器 39 40 #define GPIO_SWPORTB_DR 0x0c //B 组端口输出寄存器 41 #define GPIO_SWPORTB_DDR 0x10 //B 组端口方向控制寄存器 42 #define GPIO_EXT_PORTB 0x14 //B 组端口输入寄存器 43 44 #define GPIO_INTEN 0x18 //A 组端口中断使能寄存器 45 #define GPIO_INTMASK 0x1c //A 组端口中断屏蔽寄存器 46 #define GPIO_INTTYPE_LEVEL 0x20 //A 组端口中断等级寄存器 47 #define GPIO_INT_POLARITY 0x24 //A 组端口中断极性寄存器 48 #define GPIO_INTSTATUS 0x28 //A 组端口中断状态寄存器 49 #define GPIO_RAW_INTSTATUS 0x2c //A 组端口原始中断状态寄存器 50 51 #define GPIO_LS_SYNC 0x30 //配置中断同步寄存器 52 #define GPIO_DEBOUNCE 0x34 //防反跳配置寄存器 53 #define GPIO_PORTA_EOI 0x38 //A 组端口中断清除寄存器 54 55 /* misc marco */ 56 #define GPIO_GROUP_A 0 57 #define GPIO_OFF 0 58 #define GPIO_ON 1 59 #define GPIO_INPUT 0 60 #define GPIO_OUTPUT 1 61 FGpio_GetBaseAddr(FT_IN u32 ctrlId,FT_IN u32 groupId)62 inline static u32 FGpio_GetBaseAddr(FT_IN u32 ctrlId, FT_IN u32 groupId) 63 { 64 static const u32 CtrlAddr[2] = {GPIO_CTRL0_PA_BASE, GPIO_CTRL1_PA_BASE}; 65 static const u32 GroupOff[2] = {GPIO_GROUPA_OFFSET, GPIO_GROUPB_OFFSET}; 66 return CtrlAddr[ctrlId] + GroupOff[groupId]; 67 } 68 69 /** 70 * @name: FGpio_WriteReg 71 * @msg: write gpio register 72 * @param {u32} BaseAddress base addr of i2c 73 * @param {u32} RegOffset addr offset of i2c register 74 * @param {u32} RegisterValue val to be write into register 75 * @return {void} 76 */ 77 #define FGpioA_WriteReg(ctrlId, RegOffset, RegisterValue) Ft_out32(FGpio_GetBaseAddr(ctrlId, GPIO_GROUP_A) + (u32)RegOffset, (u32)RegisterValue) 78 79 /** 80 * @name: FGpio_ReadReg 81 * @msg: read gpio register 82 * @param {u32} BaseAddress base addr of i2c 83 * @param {u32} RegOffset addr offset of i2c register 84 * @return {u32} val read from register 85 */ 86 #define FGpioA_ReadReg(ctrlId, RegOffset) Ft_in32(FGpio_GetBaseAddr(ctrlId, GPIO_GROUP_A) + (u32)RegOffset) 87 88 #ifdef __cplusplus 89 } 90 #endif 91 92 #endif 93