1 /*
2  * Copyright (c) 2006-2021, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2015-04-14     ArdaFu      first version
9  */
10 #ifndef __UART_H__
11 #define __UART_H__
12 
13 #define R_VAL 0
14 #define R_SET 1
15 #define R_CLR 2
16 #define R_TOG 3
17 
18 typedef struct
19 {
20     volatile rt_uint32_t CTRL0[4];
21     volatile rt_uint32_t CTRL1[4];
22     volatile rt_uint32_t CTRL2[4];
23     volatile rt_uint32_t LINECTRL[4];
24     volatile rt_uint32_t INTR[4];
25     volatile rt_uint32_t DATA[4];
26     volatile rt_uint32_t STAT[4];
27     volatile const rt_uint32_t DEBUG[4];
28     volatile rt_uint32_t ILPR[4];
29     volatile rt_uint32_t RS485CTRL[4];
30     volatile rt_uint32_t RS485ADRMATCH[4];
31     volatile rt_uint32_t RS485DLY[4];
32     volatile rt_uint32_t AUTOBAUD[4];
33     volatile rt_uint32_t CTRL3[4];
34     volatile rt_uint32_t ISO7816CTRL[4];
35     volatile rt_uint32_t ISO7816ERRCNT[4];
36     volatile rt_uint32_t ISO7816STATUS[4];
37 } HW_USART_TypeDef;
38 
39 #define USART0  ((HW_USART_TypeDef *)UART0_BASE)
40 #define USART1  ((HW_USART_TypeDef *)UART1_BASE)
41 #define USART2  ((HW_USART_TypeDef *)UART2_BASE)
42 #define USART3  ((HW_USART_TypeDef *)UART3_BASE)
43 #define USART4  ((HW_USART_TypeDef *)UART4_BASE)
44 #define USART5  ((HW_USART_TypeDef *)UART5_BASE)
45 #define USART6  ((HW_USART_TypeDef *)UART6_BASE)
46 #define USART7  ((HW_USART_TypeDef *)UART7_BASE)
47 #define USART8  ((HW_USART_TypeDef *)UART8_BASE)
48 #define USART9  ((HW_USART_TypeDef *)UART9_BASE)
49 
50 
51 #define ASM_UART_INTR_RXIS   (1UL << 4)
52 #define ASM_UART_INTR_TXIS   (1UL << 5)
53 #define ASM_UART_INTR_RTIS   (1UL << 6)
54 #define ASM_UART_INTR_RXIEN  (1UL << 20)
55 #define ASM_UART_INTR_TXIEN  (1UL << 21)
56 #define ASM_UART_INTR_RTIEN  (1UL << 22)
57 
58 
59 #define UART_BAUD_DIVINT_MASK       0x003FFFC0UL
60 #define UART_BAUD_DIVFRAC_MASK      0x0000003FUL
61 #define UART_FIFO_ENABLE            0x00000010UL
62 #define MAIN_CLOCK_EXT12M           0
63 #define MAIN_CLOCK_SYSPLL           1
64 #define UART_INT_FIFO_LV_SEL_MASK   0x00770000UL
65 #define RXTIMEOUT_ENABLE            0x01000000UL
66 #define RXTIMEOUT_MASK              0x00FF0000UL
67 
68 
69 #define ASM_UART_CTRL0_SFTRST       (1UL << 31)
70 #define ASM_UART_CTRL0_CLKGATE      (1UL << 30)
71 #define ASM_UART_CTRL0_RXTO_ENABLE  (1UL << 24)
72 
73 #define ASM_UART_CTRL2_USARTEN      (1UL << 0)
74 #define ASM_UART_CTRL2_TXE          (1UL << 8)
75 #define ASM_UART_CTRL2_RXE          (1UL << 9)
76 
77 
78 #define ASM_UART_LINECTRL_PEN       (1UL << 1)
79 #define ASM_UART_LINECTRL_EPS       (1UL << 2)
80 #define ASM_UART_LINECTRL_STP2      (1UL << 3)
81 #define ASM_UART_LINECTRL_FEN       (1UL << 4)
82 #define ASM_UART_LINECTRL_WLEN5     (0UL << 5)
83 #define ASM_UART_LINECTRL_WLEN6     (1UL << 5)
84 #define ASM_UART_LINECTRL_WLEN7     (2UL << 5)
85 #define ASM_UART_LINECTRL_WLEN8     (3UL << 5)
86 #define ASM_UART_LINECTRL_SPS       (1UL << 7)
87 
88 #define ASM_UART_STAT_TXFF (1UL << 25)
89 #define ASM_UART_STAT_RXFE (1UL << 24)
90 
91 extern void Hw_UartDisable(HW_USART_TypeDef* uartBase);
92 extern void Hw_UartEnable(HW_USART_TypeDef* uartBase);
93 extern void Hw_UartReset(HW_USART_TypeDef* uartBase);
94 extern void Hw_UartConfig(HW_USART_TypeDef* uartBase, int baudRate,
95                           int dataBits, int stopBits, int parity);
96 extern void Hw_UartInit(int index);
97 #endif
98