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Searched defs:INT_MASK (Results 1 – 15 of 15) sorted by relevance

/bsp/n32/libraries/N32L43x_Firmware_Library/n32l43x_std_periph_driver/src/
A Dn32l43x_lpuart.c62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
A Dn32l43x_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/n32/libraries/N32L40x_Firmware_Library/n32l40x_std_periph_driver/src/
A Dn32l40x_lpuart.c62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
A Dn32l40x_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/n32/libraries/N32G43x_Firmware_Library/n32g43x_std_periph_driver/src/
A Dn32g43x_lpuart.c62 #define INT_MASK ((uint16_t)0x007F) /*!< LPUART Interrupt Mask */ macro
A Dn32g43x_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/k230/drivers/interdrv/gpio/
A Ddrv_gpio.h46 #define INT_MASK 0x34 macro
/bsp/n32/libraries/N32G4FR_Firmware_Library/n32g4fr_std_periph_driver/src/
A Dn32g4fr_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/n32/libraries/N32G45x_Firmware_Library/n32g45x_std_periph_driver/src/
A Dn32g45x_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/n32/libraries/N32WB452_Firmware_Library/n32wb452_std_periph_driver/src/
A Dn32wb452_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/n32g452xx/Libraries/N32_Std_Driver/n32g45x_std_periph_driver/src/
A Dn32g45x_usart.c93 #define INT_MASK ((uint16_t)0x001F) /*!< USART Interrupt Mask */ macro
/bsp/airm2m/air105/libraries/HAL_Driver/Inc/
A Dair105.h354 __IO uint32_t INT_MASK; member
/bsp/CME_M7/StdPeriph_Driver/inc/
A Dcmem7.h176 …__IO uint32_t INT_MASK; /*!< interrupt mask register … member
417 …__IO uint32_t INT_MASK; /*!< interrupt mask Register … member
571 …__IO uint32_t INT_MASK; /*!< I2C interrupt mask register … member
1048 …__IO uint32_t INT_MASK; /*!< interrupt mask register … member
/bsp/rv32m1_vega/rv32m1_sdk_riscv/devices/RV32M1/
A DRV32M1_ri5cy.h4665 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
19958 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member
A DRV32M1_zero_riscy.h3935 __IO uint32_t INT_MASK; /**< Interrupt Mask Register, offset: 0x14 */ member
20785 __IO uint32_t INT_MASK; /**< Mask Register, offset: 0xA8 */ member

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