1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_H
10 #define HPM_SOC_H
11 
12 
13 /* List of external IRQs */
14 #define IRQn_GPIO0_A                   1       /* GPIO0_A IRQ */
15 #define IRQn_GPIO0_B                   2       /* GPIO0_B IRQ */
16 #define IRQn_GPIO0_C                   3       /* GPIO0_C IRQ */
17 #define IRQn_GPIO0_D                   4       /* GPIO0_D IRQ */
18 #define IRQn_GPIO0_E                   5       /* GPIO0_E IRQ */
19 #define IRQn_GPIO0_F                   6       /* GPIO0_F IRQ */
20 #define IRQn_GPIO0_X                   7       /* GPIO0_X IRQ */
21 #define IRQn_GPIO0_Y                   8       /* GPIO0_Y IRQ */
22 #define IRQn_GPIO0_Z                   9       /* GPIO0_Z IRQ */
23 #define IRQn_MCAN0                     10      /* MCAN0 IRQ */
24 #define IRQn_MCAN1                     11      /* MCAN1 IRQ */
25 #define IRQn_MCAN2                     12      /* MCAN2 IRQ */
26 #define IRQn_MCAN3                     13      /* MCAN3 IRQ */
27 #define IRQn_MCAN4                     14      /* MCAN4 IRQ */
28 #define IRQn_MCAN5                     15      /* MCAN5 IRQ */
29 #define IRQn_MCAN6                     16      /* MCAN6 IRQ */
30 #define IRQn_MCAN7                     17      /* MCAN7 IRQ */
31 #define IRQn_PTPC                      18      /* PTPC IRQ */
32 #define IRQn_UART0                     27      /* UART0 IRQ */
33 #define IRQn_UART1                     28      /* UART1 IRQ */
34 #define IRQn_UART2                     29      /* UART2 IRQ */
35 #define IRQn_UART3                     30      /* UART3 IRQ */
36 #define IRQn_UART4                     31      /* UART4 IRQ */
37 #define IRQn_UART5                     32      /* UART5 IRQ */
38 #define IRQn_UART6                     33      /* UART6 IRQ */
39 #define IRQn_UART7                     34      /* UART7 IRQ */
40 #define IRQn_I2C0                      35      /* I2C0 IRQ */
41 #define IRQn_I2C1                      36      /* I2C1 IRQ */
42 #define IRQn_I2C2                      37      /* I2C2 IRQ */
43 #define IRQn_I2C3                      38      /* I2C3 IRQ */
44 #define IRQn_SPI0                      39      /* SPI0 IRQ */
45 #define IRQn_SPI1                      40      /* SPI1 IRQ */
46 #define IRQn_SPI2                      41      /* SPI2 IRQ */
47 #define IRQn_SPI3                      42      /* SPI3 IRQ */
48 #define IRQn_GPTMR0                    43      /* GPTMR0 IRQ */
49 #define IRQn_GPTMR1                    44      /* GPTMR1 IRQ */
50 #define IRQn_GPTMR2                    45      /* GPTMR2 IRQ */
51 #define IRQn_GPTMR3                    46      /* GPTMR3 IRQ */
52 #define IRQn_GPTMR4                    47      /* GPTMR4 IRQ */
53 #define IRQn_GPTMR5                    48      /* GPTMR5 IRQ */
54 #define IRQn_GPTMR6                    49      /* GPTMR6 IRQ */
55 #define IRQn_GPTMR7                    50      /* GPTMR7 IRQ */
56 #define IRQn_EWDG0                     51      /* EWDG0 IRQ */
57 #define IRQn_EWDG1                     52      /* EWDG1 IRQ */
58 #define IRQn_MBX0A                     53      /* MBX0A IRQ */
59 #define IRQn_MBX0B                     54      /* MBX0B IRQ */
60 #define IRQn_MBX1A                     55      /* MBX1A IRQ */
61 #define IRQn_MBX1B                     56      /* MBX1B IRQ */
62 #define IRQn_RNG                       57      /* RNG IRQ */
63 #define IRQn_HDMA                      58      /* HDMA IRQ */
64 #define IRQn_ADC0                      59      /* ADC0 IRQ */
65 #define IRQn_ADC1                      60      /* ADC1 IRQ */
66 #define IRQn_SDM                       61      /* SDM IRQ */
67 #define IRQn_OPAMP                     62      /* OPAMP IRQ */
68 #define IRQn_I2S0                      63      /* I2S0 IRQ */
69 #define IRQn_I2S1                      64      /* I2S1 IRQ */
70 #define IRQn_I2S2                      65      /* I2S2 IRQ */
71 #define IRQn_I2S3                      66      /* I2S3 IRQ */
72 #define IRQn_DAO                       67      /* DAO IRQ */
73 #define IRQn_PDM                       68      /* PDM IRQ */
74 #define IRQn_SMIX_DMA                  69      /* SMIX_DMA IRQ */
75 #define IRQn_SMIX_ASRC                 70      /* SMIX_ASRC IRQ */
76 #define IRQn_CAM0                      71      /* CAM0 IRQ */
77 #define IRQn_CAM1                      72      /* CAM1 IRQ */
78 #define IRQn_LCDC                      73      /* LCDC IRQ */
79 #define IRQn_LCDC1                     74      /* LCDC1 IRQ */
80 #define IRQn_PDMA                      75      /* PDMA IRQ */
81 #define IRQn_JPEG                      76      /* JPEG IRQ */
82 #define IRQn_GWCK0_FUNC                77      /* GWCK0_FUNC IRQ */
83 #define IRQn_GWCK0_ERR                 78      /* GWCK0_ERR IRQ */
84 #define IRQn_GWCK1_FUNC                79      /* GWCK1_FUNC IRQ */
85 #define IRQn_GWCK1_ERR                 80      /* GWCK1_ERR IRQ */
86 #define IRQn_MIPI_DSI0                 81      /* MIPI_DSI0 IRQ */
87 #define IRQn_MIPI_DSI1                 82      /* MIPI_DSI1 IRQ */
88 #define IRQn_MIPI_CSI0                 83      /* MIPI_CSI0 IRQ */
89 #define IRQn_MIPI_CSI0_AP              84      /* MIPI_CSI0_AP IRQ */
90 #define IRQn_MIPI_CSI0_DIAG            85      /* MIPI_CSI0_DIAG IRQ */
91 #define IRQn_MIPI_CSI1_AP              86      /* MIPI_CSI1_AP IRQ */
92 #define IRQn_MIPI_CSI1_DIAG            87      /* MIPI_CSI1_DIAG IRQ */
93 #define IRQn_MIPI_CSI1                 88      /* MIPI_CSI1 IRQ */
94 #define IRQn_LCB0                      89      /* LCB0 IRQ */
95 #define IRQn_LCB1                      90      /* LCB1 IRQ */
96 #define IRQn_GPU                       91      /* GPU IRQ */
97 #define IRQn_ENET0                     92      /* ENET0 IRQ */
98 #define IRQn_NTMR0                     93      /* NTMR0 IRQ */
99 #define IRQn_USB0                      94      /* USB0 IRQ */
100 #define IRQn_SDXC0                     95      /* SDXC0 IRQ */
101 #define IRQn_SDXC1                     96      /* SDXC1 IRQ */
102 #define IRQn_SDP                       97      /* SDP IRQ */
103 #define IRQn_XPI0                      98      /* XPI0 IRQ */
104 #define IRQn_XDMA                      99      /* XDMA IRQ */
105 #define IRQn_DDR                       100     /* DDR IRQ */
106 #define IRQn_FFA                       101     /* FFA IRQ */
107 #define IRQn_PSEC                      102     /* PSEC IRQ */
108 #define IRQn_TSNS                      103     /* TSNS IRQ */
109 #define IRQn_VAD                       104     /* VAD IRQ */
110 #define IRQn_PGPIO                     105     /* PGPIO IRQ */
111 #define IRQn_PWDG                      106     /* PWDG IRQ */
112 #define IRQn_PTMR                      107     /* PTMR IRQ */
113 #define IRQn_PUART                     108     /* PUART IRQ */
114 #define IRQn_FUSE                      109     /* FUSE IRQ */
115 #define IRQn_SECMON                    110     /* SECMON IRQ */
116 #define IRQn_RTC                       111     /* RTC IRQ */
117 #define IRQn_BGPIO                     112     /* BGPIO IRQ */
118 #define IRQn_BVIO                      113     /* BVIO IRQ */
119 #define IRQn_BROWNOUT                  114     /* BROWNOUT IRQ */
120 #define IRQn_SYSCTL                    115     /* SYSCTL IRQ */
121 #define IRQn_DEBUG0                    116     /* DEBUG0 IRQ */
122 #define IRQn_DEBUG1                    117     /* DEBUG1 IRQ */
123 
124 #include "hpm_common.h"
125 
126 #include "hpm_gpio_regs.h"
127 /* Address of GPIO instances */
128 /* FGPIO base address */
129 #define HPM_FGPIO_BASE (0xC0000UL)
130 /* FGPIO base pointer */
131 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
132 /* GPIO0 base address */
133 #define HPM_GPIO0_BASE (0xF00D0000UL)
134 /* GPIO0 base pointer */
135 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
136 /* PGPIO base address */
137 #define HPM_PGPIO_BASE (0xF411C000UL)
138 /* PGPIO base pointer */
139 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
140 /* BGPIO base address */
141 #define HPM_BGPIO_BASE (0xF4214000UL)
142 /* BGPIO base pointer */
143 #define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE)
144 
145 /* Address of DM instances */
146 /* DM base address */
147 #define HPM_DM_BASE (0x30000000UL)
148 
149 #include "hpm_plic_regs.h"
150 /* Address of PLIC instances */
151 /* PLIC base address */
152 #define HPM_PLIC_BASE (0xE4000000UL)
153 /* PLIC base pointer */
154 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
155 
156 #include "hpm_mchtmr_regs.h"
157 /* Address of MCHTMR instances */
158 /* MCHTMR base address */
159 #define HPM_MCHTMR_BASE (0xE6000000UL)
160 /* MCHTMR base pointer */
161 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
162 
163 #include "hpm_plic_sw_regs.h"
164 /* Address of PLICSW instances */
165 /* PLICSW base address */
166 #define HPM_PLICSW_BASE (0xE6400000UL)
167 /* PLICSW base pointer */
168 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
169 
170 #include "hpm_crc_regs.h"
171 /* Address of CRC instances */
172 /* CRC base address */
173 #define HPM_CRC_BASE (0xF000C000UL)
174 /* CRC base pointer */
175 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
176 
177 #include "hpm_uart_regs.h"
178 /* Address of UART instances */
179 /* UART0 base address */
180 #define HPM_UART0_BASE (0xF0040000UL)
181 /* UART0 base pointer */
182 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
183 /* UART1 base address */
184 #define HPM_UART1_BASE (0xF0044000UL)
185 /* UART1 base pointer */
186 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
187 /* UART2 base address */
188 #define HPM_UART2_BASE (0xF0048000UL)
189 /* UART2 base pointer */
190 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
191 /* UART3 base address */
192 #define HPM_UART3_BASE (0xF004C000UL)
193 /* UART3 base pointer */
194 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
195 /* UART4 base address */
196 #define HPM_UART4_BASE (0xF0050000UL)
197 /* UART4 base pointer */
198 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
199 /* UART5 base address */
200 #define HPM_UART5_BASE (0xF0054000UL)
201 /* UART5 base pointer */
202 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
203 /* UART6 base address */
204 #define HPM_UART6_BASE (0xF0058000UL)
205 /* UART6 base pointer */
206 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
207 /* UART7 base address */
208 #define HPM_UART7_BASE (0xF005C000UL)
209 /* UART7 base pointer */
210 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
211 /* PUART base address */
212 #define HPM_PUART_BASE (0xF4124000UL)
213 /* PUART base pointer */
214 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
215 
216 #include "hpm_i2c_regs.h"
217 /* Address of I2C instances */
218 /* I2C0 base address */
219 #define HPM_I2C0_BASE (0xF0060000UL)
220 /* I2C0 base pointer */
221 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
222 /* I2C1 base address */
223 #define HPM_I2C1_BASE (0xF0064000UL)
224 /* I2C1 base pointer */
225 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
226 /* I2C2 base address */
227 #define HPM_I2C2_BASE (0xF0068000UL)
228 /* I2C2 base pointer */
229 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
230 /* I2C3 base address */
231 #define HPM_I2C3_BASE (0xF006C000UL)
232 /* I2C3 base pointer */
233 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
234 
235 #include "hpm_spi_regs.h"
236 /* Address of SPI instances */
237 /* SPI0 base address */
238 #define HPM_SPI0_BASE (0xF0070000UL)
239 /* SPI0 base pointer */
240 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
241 /* SPI1 base address */
242 #define HPM_SPI1_BASE (0xF0074000UL)
243 /* SPI1 base pointer */
244 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
245 /* SPI2 base address */
246 #define HPM_SPI2_BASE (0xF0078000UL)
247 /* SPI2 base pointer */
248 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
249 /* SPI3 base address */
250 #define HPM_SPI3_BASE (0xF007C000UL)
251 /* SPI3 base pointer */
252 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
253 
254 #include "hpm_gptmr_regs.h"
255 /* Address of GPTMR instances */
256 /* GPTMR0 base address */
257 #define HPM_GPTMR0_BASE (0xF0080000UL)
258 /* GPTMR0 base pointer */
259 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
260 /* GPTMR1 base address */
261 #define HPM_GPTMR1_BASE (0xF0084000UL)
262 /* GPTMR1 base pointer */
263 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
264 /* GPTMR2 base address */
265 #define HPM_GPTMR2_BASE (0xF0088000UL)
266 /* GPTMR2 base pointer */
267 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
268 /* GPTMR3 base address */
269 #define HPM_GPTMR3_BASE (0xF008C000UL)
270 /* GPTMR3 base pointer */
271 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
272 /* GPTMR4 base address */
273 #define HPM_GPTMR4_BASE (0xF0090000UL)
274 /* GPTMR4 base pointer */
275 #define HPM_GPTMR4 ((GPTMR_Type *) HPM_GPTMR4_BASE)
276 /* GPTMR5 base address */
277 #define HPM_GPTMR5_BASE (0xF0094000UL)
278 /* GPTMR5 base pointer */
279 #define HPM_GPTMR5 ((GPTMR_Type *) HPM_GPTMR5_BASE)
280 /* GPTMR6 base address */
281 #define HPM_GPTMR6_BASE (0xF0098000UL)
282 /* GPTMR6 base pointer */
283 #define HPM_GPTMR6 ((GPTMR_Type *) HPM_GPTMR6_BASE)
284 /* GPTMR7 base address */
285 #define HPM_GPTMR7_BASE (0xF009C000UL)
286 /* GPTMR7 base pointer */
287 #define HPM_GPTMR7 ((GPTMR_Type *) HPM_GPTMR7_BASE)
288 /* NTMR0 base address */
289 #define HPM_NTMR0_BASE (0xF1110000UL)
290 /* NTMR0 base pointer */
291 #define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
292 /* PTMR base address */
293 #define HPM_PTMR_BASE (0xF4120000UL)
294 /* PTMR base pointer */
295 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
296 
297 #include "hpm_mbx_regs.h"
298 /* Address of MBX instances */
299 /* MBX0A base address */
300 #define HPM_MBX0A_BASE (0xF00A0000UL)
301 /* MBX0A base pointer */
302 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
303 /* MBX0B base address */
304 #define HPM_MBX0B_BASE (0xF00A4000UL)
305 /* MBX0B base pointer */
306 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
307 /* MBX1A base address */
308 #define HPM_MBX1A_BASE (0xF00A8000UL)
309 /* MBX1A base pointer */
310 #define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
311 /* MBX1B base address */
312 #define HPM_MBX1B_BASE (0xF00AC000UL)
313 /* MBX1B base pointer */
314 #define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
315 
316 #include "hpm_ewdg_regs.h"
317 /* Address of EWDG instances */
318 /* EWDG0 base address */
319 #define HPM_EWDG0_BASE (0xF00B0000UL)
320 /* EWDG0 base pointer */
321 #define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
322 /* EWDG1 base address */
323 #define HPM_EWDG1_BASE (0xF00B4000UL)
324 /* EWDG1 base pointer */
325 #define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
326 /* PEWDG base address */
327 #define HPM_PEWDG_BASE (0xF4128000UL)
328 /* PEWDG base pointer */
329 #define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
330 
331 #include "hpm_dmamux_regs.h"
332 /* Address of DMAMUX instances */
333 /* DMAMUX base address */
334 #define HPM_DMAMUX_BASE (0xF00C4000UL)
335 /* DMAMUX base pointer */
336 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
337 
338 #include "hpm_dmav2_regs.h"
339 /* Address of DMAV2 instances */
340 /* HDMA base address */
341 #define HPM_HDMA_BASE (0xF00C8000UL)
342 /* HDMA base pointer */
343 #define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
344 /* XDMA base address */
345 #define HPM_XDMA_BASE (0xF3008000UL)
346 /* XDMA base pointer */
347 #define HPM_XDMA ((DMAV2_Type *) HPM_XDMA_BASE)
348 
349 #include "hpm_gpiom_regs.h"
350 /* Address of GPIOM instances */
351 /* GPIOM base address */
352 #define HPM_GPIOM_BASE (0xF00D8000UL)
353 /* GPIOM base pointer */
354 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
355 
356 #include "hpm_adc16_regs.h"
357 /* Address of ADC16 instances */
358 /* ADC0 base address */
359 #define HPM_ADC0_BASE (0xF00E0000UL)
360 /* ADC0 base pointer */
361 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
362 
363 #include "hpm_i2s_regs.h"
364 /* Address of I2S instances */
365 /* I2S0 base address */
366 #define HPM_I2S0_BASE (0xF0200000UL)
367 /* I2S0 base pointer */
368 #define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
369 /* I2S1 base address */
370 #define HPM_I2S1_BASE (0xF0204000UL)
371 /* I2S1 base pointer */
372 #define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
373 /* I2S2 base address */
374 #define HPM_I2S2_BASE (0xF0208000UL)
375 /* I2S2 base pointer */
376 #define HPM_I2S2 ((I2S_Type *) HPM_I2S2_BASE)
377 /* I2S3 base address */
378 #define HPM_I2S3_BASE (0xF020C000UL)
379 /* I2S3 base pointer */
380 #define HPM_I2S3 ((I2S_Type *) HPM_I2S3_BASE)
381 
382 #include "hpm_dao_regs.h"
383 /* Address of DAO instances */
384 /* DAO base address */
385 #define HPM_DAO_BASE (0xF0210000UL)
386 /* DAO base pointer */
387 #define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
388 
389 #include "hpm_pdm_regs.h"
390 /* Address of PDM instances */
391 /* PDM base address */
392 #define HPM_PDM_BASE (0xF0214000UL)
393 /* PDM base pointer */
394 #define HPM_PDM ((PDM_Type *) HPM_PDM_BASE)
395 
396 #include "hpm_smix_regs.h"
397 /* Address of SMIX instances */
398 /* SMIX base address */
399 #define HPM_SMIX_BASE (0xF0218000UL)
400 /* SMIX base pointer */
401 #define HPM_SMIX ((SMIX_Type *) HPM_SMIX_BASE)
402 
403 #include "hpm_mcan_regs.h"
404 /* Address of MCAN instances */
405 /* MCAN0 base address */
406 #define HPM_MCAN0_BASE (0xF0280000UL)
407 /* MCAN0 base pointer */
408 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
409 /* MCAN1 base address */
410 #define HPM_MCAN1_BASE (0xF0284000UL)
411 /* MCAN1 base pointer */
412 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
413 /* MCAN2 base address */
414 #define HPM_MCAN2_BASE (0xF0288000UL)
415 /* MCAN2 base pointer */
416 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
417 /* MCAN3 base address */
418 #define HPM_MCAN3_BASE (0xF028C000UL)
419 /* MCAN3 base pointer */
420 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
421 /* MCAN4 base address */
422 #define HPM_MCAN4_BASE (0xF0290000UL)
423 /* MCAN4 base pointer */
424 #define HPM_MCAN4 ((MCAN_Type *) HPM_MCAN4_BASE)
425 /* MCAN5 base address */
426 #define HPM_MCAN5_BASE (0xF0294000UL)
427 /* MCAN5 base pointer */
428 #define HPM_MCAN5 ((MCAN_Type *) HPM_MCAN5_BASE)
429 /* MCAN6 base address */
430 #define HPM_MCAN6_BASE (0xF0298000UL)
431 /* MCAN6 base pointer */
432 #define HPM_MCAN6 ((MCAN_Type *) HPM_MCAN6_BASE)
433 /* MCAN7 base address */
434 #define HPM_MCAN7_BASE (0xF029C000UL)
435 /* MCAN7 base pointer */
436 #define HPM_MCAN7 ((MCAN_Type *) HPM_MCAN7_BASE)
437 
438 #include "hpm_ptpc_regs.h"
439 /* Address of PTPC instances */
440 /* PTPC base address */
441 #define HPM_PTPC_BASE (0xF02FC000UL)
442 /* PTPC base pointer */
443 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
444 
445 #include "hpm_lcdc_regs.h"
446 /* Address of LCDC instances */
447 /* LCDC base address */
448 #define HPM_LCDC_BASE (0xF1000000UL)
449 /* LCDC base pointer */
450 #define HPM_LCDC ((LCDC_Type *) HPM_LCDC_BASE)
451 /* LCDC1 base address */
452 #define HPM_LCDC1_BASE (0xF1004000UL)
453 /* LCDC1 base pointer */
454 #define HPM_LCDC1 ((LCDC_Type *) HPM_LCDC1_BASE)
455 
456 #include "hpm_cam_regs.h"
457 /* Address of CAM instances */
458 /* CAM0 base address */
459 #define HPM_CAM0_BASE (0xF1008000UL)
460 /* CAM0 base pointer */
461 #define HPM_CAM0 ((CAM_Type *) HPM_CAM0_BASE)
462 /* CAM1 base address */
463 #define HPM_CAM1_BASE (0xF100C000UL)
464 /* CAM1 base pointer */
465 #define HPM_CAM1 ((CAM_Type *) HPM_CAM1_BASE)
466 
467 #include "hpm_pdma_regs.h"
468 /* Address of PDMA instances */
469 /* PDMA base address */
470 #define HPM_PDMA_BASE (0xF1010000UL)
471 /* PDMA base pointer */
472 #define HPM_PDMA ((PDMA_Type *) HPM_PDMA_BASE)
473 
474 #include "hpm_jpeg_regs.h"
475 /* Address of JPEG instances */
476 /* JPEG base address */
477 #define HPM_JPEG_BASE (0xF1014000UL)
478 /* JPEG base pointer */
479 #define HPM_JPEG ((JPEG_Type *) HPM_JPEG_BASE)
480 
481 #include "hpm_gwc_regs.h"
482 /* Address of GWC instances */
483 /* GWC0 base address */
484 #define HPM_GWC0_BASE (0xF1018000UL)
485 /* GWC0 base pointer */
486 #define HPM_GWC0 ((GWC_Type *) HPM_GWC0_BASE)
487 /* GWC1 base address */
488 #define HPM_GWC1_BASE (0xF101C000UL)
489 /* GWC1 base pointer */
490 #define HPM_GWC1 ((GWC_Type *) HPM_GWC1_BASE)
491 
492 #include "hpm_mipi_dsi_regs.h"
493 /* Address of MIPI_DSI instances */
494 /* MIPI_DSI0 base address */
495 #define HPM_MIPI_DSI0_BASE (0xF1020000UL)
496 /* MIPI_DSI0 base pointer */
497 #define HPM_MIPI_DSI0 ((MIPI_DSI_Type *) HPM_MIPI_DSI0_BASE)
498 /* MIPI_DSI1 base address */
499 #define HPM_MIPI_DSI1_BASE (0xF1024000UL)
500 /* MIPI_DSI1 base pointer */
501 #define HPM_MIPI_DSI1 ((MIPI_DSI_Type *) HPM_MIPI_DSI1_BASE)
502 
503 #include "hpm_mipi_csi_regs.h"
504 /* Address of MIPI_CSI instances */
505 /* MIPI_CSI0 base address */
506 #define HPM_MIPI_CSI0_BASE (0xF1028000UL)
507 /* MIPI_CSI0 base pointer */
508 #define HPM_MIPI_CSI0 ((MIPI_CSI_Type *) HPM_MIPI_CSI0_BASE)
509 /* MIPI_CSI1 base address */
510 #define HPM_MIPI_CSI1_BASE (0xF102C000UL)
511 /* MIPI_CSI1 base pointer */
512 #define HPM_MIPI_CSI1 ((MIPI_CSI_Type *) HPM_MIPI_CSI1_BASE)
513 
514 #include "hpm_lvb_regs.h"
515 /* Address of LVB instances */
516 /* LVB base address */
517 #define HPM_LVB_BASE (0xF1030000UL)
518 /* LVB base pointer */
519 #define HPM_LVB ((LVB_Type *) HPM_LVB_BASE)
520 
521 #include "hpm_pixelmux_regs.h"
522 /* Address of PIXELMUX instances */
523 /* PIXEL_MUX base address */
524 #define HPM_PIXEL_MUX_BASE (0xF1034000UL)
525 /* PIXEL_MUX base pointer */
526 #define HPM_PIXEL_MUX ((PIXELMUX_Type *) HPM_PIXEL_MUX_BASE)
527 
528 #include "hpm_lcb_regs.h"
529 /* Address of LCB instances */
530 /* LCB base address */
531 #define HPM_LCB_BASE (0xF1038000UL)
532 /* LCB base pointer */
533 #define HPM_LCB ((LCB_Type *) HPM_LCB_BASE)
534 
535 #include "hpm_gpu_regs.h"
536 /* Address of GPU instances */
537 /* GPU base address */
538 #define HPM_GPU_BASE (0xF1080000UL)
539 /* GPU base pointer */
540 #define HPM_GPU ((GPU_Type *) HPM_GPU_BASE)
541 
542 #include "hpm_enet_regs.h"
543 /* Address of ENET instances */
544 /* ENET0 base address */
545 #define HPM_ENET0_BASE (0xF1100000UL)
546 /* ENET0 base pointer */
547 #define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
548 
549 #include "hpm_usb_regs.h"
550 /* Address of USB instances */
551 /* USB0 base address */
552 #define HPM_USB0_BASE (0xF1120000UL)
553 /* USB0 base pointer */
554 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
555 
556 #include "hpm_sdxc_regs.h"
557 /* Address of SDXC instances */
558 /* SDXC0 base address */
559 #define HPM_SDXC0_BASE (0xF1130000UL)
560 /* SDXC0 base pointer */
561 #define HPM_SDXC0 ((SDXC_Type *) HPM_SDXC0_BASE)
562 /* SDXC1 base address */
563 #define HPM_SDXC1_BASE (0xF1134000UL)
564 /* SDXC1 base pointer */
565 #define HPM_SDXC1 ((SDXC_Type *) HPM_SDXC1_BASE)
566 
567 #include "hpm_ddrctl_regs.h"
568 /* Address of DDRCTL instances */
569 /* DDRCTL base address */
570 #define HPM_DDRCTL_BASE (0xF3010000UL)
571 /* DDRCTL base pointer */
572 #define HPM_DDRCTL ((DDRCTL_Type *) HPM_DDRCTL_BASE)
573 
574 /* Address of ROMC instances */
575 /* ROMC base address */
576 #define HPM_ROMC_BASE (0xF3014000UL)
577 
578 #include "hpm_ffa_regs.h"
579 /* Address of FFA instances */
580 /* FFA base address */
581 #define HPM_FFA_BASE (0xF3018000UL)
582 /* FFA base pointer */
583 #define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
584 
585 #include "hpm_sdp_regs.h"
586 /* Address of SDP instances */
587 /* SDP base address */
588 #define HPM_SDP_BASE (0xF3040000UL)
589 /* SDP base pointer */
590 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
591 
592 #include "hpm_sec_regs.h"
593 /* Address of SEC instances */
594 /* SEC base address */
595 #define HPM_SEC_BASE (0xF3044000UL)
596 /* SEC base pointer */
597 #define HPM_SEC ((SEC_Type *) HPM_SEC_BASE)
598 
599 #include "hpm_mon_regs.h"
600 /* Address of MON instances */
601 /* MON base address */
602 #define HPM_MON_BASE (0xF3048000UL)
603 /* MON base pointer */
604 #define HPM_MON ((MON_Type *) HPM_MON_BASE)
605 
606 #include "hpm_rng_regs.h"
607 /* Address of RNG instances */
608 /* RNG base address */
609 #define HPM_RNG_BASE (0xF304C000UL)
610 /* RNG base pointer */
611 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
612 
613 #include "hpm_otp_regs.h"
614 /* Address of OTP instances */
615 /* OTP base address */
616 #define HPM_OTP_BASE (0xF3050000UL)
617 /* OTP base pointer */
618 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
619 
620 #include "hpm_keym_regs.h"
621 /* Address of KEYM instances */
622 /* KEYM base address */
623 #define HPM_KEYM_BASE (0xF3054000UL)
624 /* KEYM base pointer */
625 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
626 
627 #include "hpm_sysctl_regs.h"
628 /* Address of SYSCTL instances */
629 /* SYSCTL base address */
630 #define HPM_SYSCTL_BASE (0xF4000000UL)
631 /* SYSCTL base pointer */
632 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
633 
634 #include "hpm_ioc_regs.h"
635 /* Address of IOC instances */
636 /* IOC base address */
637 #define HPM_IOC_BASE (0xF4040000UL)
638 /* IOC base pointer */
639 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
640 /* PIOC base address */
641 #define HPM_PIOC_BASE (0xF4118000UL)
642 /* PIOC base pointer */
643 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
644 /* BIOC base address */
645 #define HPM_BIOC_BASE (0xF4210000UL)
646 /* BIOC base pointer */
647 #define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE)
648 
649 #include "hpm_pllctlv2_regs.h"
650 /* Address of PLLCTLV2 instances */
651 /* PLLCTLV2 base address */
652 #define HPM_PLLCTLV2_BASE (0xF40C0000UL)
653 /* PLLCTLV2 base pointer */
654 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
655 
656 #include "hpm_ppor_regs.h"
657 /* Address of PPOR instances */
658 /* PPOR base address */
659 #define HPM_PPOR_BASE (0xF4100000UL)
660 /* PPOR base pointer */
661 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
662 
663 #include "hpm_pcfg_regs.h"
664 /* Address of PCFG instances */
665 /* PCFG base address */
666 #define HPM_PCFG_BASE (0xF4104000UL)
667 /* PCFG base pointer */
668 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
669 
670 #include "hpm_pgpr_regs.h"
671 /* Address of PGPR instances */
672 /* PGPR0 base address */
673 #define HPM_PGPR0_BASE (0xF4110000UL)
674 /* PGPR0 base pointer */
675 #define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
676 /* PGPR1 base address */
677 #define HPM_PGPR1_BASE (0xF4114000UL)
678 /* PGPR1 base pointer */
679 #define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
680 
681 #include "hpm_vad_regs.h"
682 /* Address of VAD instances */
683 /* VAD base address */
684 #define HPM_VAD_BASE (0xF412C000UL)
685 /* VAD base pointer */
686 #define HPM_VAD ((VAD_Type *) HPM_VAD_BASE)
687 
688 #include "hpm_mipi_dsi_phy_regs.h"
689 /* Address of MIPI_DSI_PHY instances */
690 /* MIPI_DSI_PHY0 base address */
691 #define HPM_MIPI_DSI_PHY0_BASE (0xF4140000UL)
692 /* MIPI_DSI_PHY0 base pointer */
693 #define HPM_MIPI_DSI_PHY0 ((MIPI_DSI_PHY_Type *) HPM_MIPI_DSI_PHY0_BASE)
694 /* MIPI_DSI_PHY1 base address */
695 #define HPM_MIPI_DSI_PHY1_BASE (0xF4144000UL)
696 /* MIPI_DSI_PHY1 base pointer */
697 #define HPM_MIPI_DSI_PHY1 ((MIPI_DSI_PHY_Type *) HPM_MIPI_DSI_PHY1_BASE)
698 
699 #include "hpm_mipi_csi_phy_regs.h"
700 /* Address of MIPI_CSI_PHY instances */
701 /* MIPI_CSI_PHY0 base address */
702 #define HPM_MIPI_CSI_PHY0_BASE (0xF4148000UL)
703 /* MIPI_CSI_PHY0 base pointer */
704 #define HPM_MIPI_CSI_PHY0 ((MIPI_CSI_PHY_Type *) HPM_MIPI_CSI_PHY0_BASE)
705 /* MIPI_CSI_PHY1 base address */
706 #define HPM_MIPI_CSI_PHY1_BASE (0xF414C000UL)
707 /* MIPI_CSI_PHY1 base pointer */
708 #define HPM_MIPI_CSI_PHY1 ((MIPI_CSI_PHY_Type *) HPM_MIPI_CSI_PHY1_BASE)
709 
710 #include "hpm_ddrphy_regs.h"
711 /* Address of DDRPHY instances */
712 /* DDRPHY base address */
713 #define HPM_DDRPHY_BASE (0xF4150000UL)
714 /* DDRPHY base pointer */
715 #define HPM_DDRPHY ((DDRPHY_Type *) HPM_DDRPHY_BASE)
716 
717 #include "hpm_tsns_regs.h"
718 /* Address of TSNS instances */
719 /* TSNS base address */
720 #define HPM_TSNS_BASE (0xF4154000UL)
721 /* TSNS base pointer */
722 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
723 
724 #include "hpm_bacc_regs.h"
725 /* Address of BACC instances */
726 /* BACC base address */
727 #define HPM_BACC_BASE (0xF4200000UL)
728 /* BACC base pointer */
729 #define HPM_BACC ((BACC_Type *) HPM_BACC_BASE)
730 
731 #include "hpm_bpor_regs.h"
732 /* Address of BPOR instances */
733 /* BPOR base address */
734 #define HPM_BPOR_BASE (0xF4204000UL)
735 /* BPOR base pointer */
736 #define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE)
737 
738 #include "hpm_bcfg_regs.h"
739 /* Address of BCFG instances */
740 /* BCFG base address */
741 #define HPM_BCFG_BASE (0xF4208000UL)
742 /* BCFG base pointer */
743 #define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE)
744 
745 #include "hpm_butn_regs.h"
746 /* Address of BUTN instances */
747 /* BUTN base address */
748 #define HPM_BUTN_BASE (0xF420C000UL)
749 /* BUTN base pointer */
750 #define HPM_BUTN ((BUTN_Type *) HPM_BUTN_BASE)
751 
752 #include "hpm_bgpr_regs.h"
753 /* Address of BGPR instances */
754 /* BGPR base address */
755 #define HPM_BGPR_BASE (0xF4218000UL)
756 /* BGPR base pointer */
757 #define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE)
758 
759 #include "hpm_rtc_regs.h"
760 /* Address of RTC instances */
761 /* RTCSHW base address */
762 #define HPM_RTCSHW_BASE (0xF421C000UL)
763 /* RTCSHW base pointer */
764 #define HPM_RTCSHW ((RTC_Type *) HPM_RTCSHW_BASE)
765 /* RTC base address */
766 #define HPM_RTC_BASE (0xF4244000UL)
767 /* RTC base pointer */
768 #define HPM_RTC ((RTC_Type *) HPM_RTC_BASE)
769 
770 #include "hpm_bsec_regs.h"
771 /* Address of BSEC instances */
772 /* BSEC base address */
773 #define HPM_BSEC_BASE (0xF4240000UL)
774 /* BSEC base pointer */
775 #define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE)
776 
777 #include "hpm_bkey_regs.h"
778 /* Address of BKEY instances */
779 /* BKEY base address */
780 #define HPM_BKEY_BASE (0xF4248000UL)
781 /* BKEY base pointer */
782 #define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE)
783 
784 #include "hpm_bmon_regs.h"
785 /* Address of BMON instances */
786 /* BMON base address */
787 #define HPM_BMON_BASE (0xF424C000UL)
788 /* BMON base pointer */
789 #define HPM_BMON ((BMON_Type *) HPM_BMON_BASE)
790 
791 #include "hpm_tamp_regs.h"
792 /* Address of TAMP instances */
793 /* TAMP base address */
794 #define HPM_TAMP_BASE (0xF4250000UL)
795 /* TAMP base pointer */
796 #define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE)
797 
798 #include "hpm_mono_regs.h"
799 /* Address of MONO instances */
800 /* MONO base address */
801 #define HPM_MONO_BASE (0xF4254000UL)
802 /* MONO base pointer */
803 #define HPM_MONO ((MONO_Type *) HPM_MONO_BASE)
804 
805 
806 #include "riscv/riscv_core.h"
807 #include "hpm_csr_regs.h"
808 #include "hpm_interrupt.h"
809 #include "hpm_misc.h"
810 #include "hpm_dmamux_src.h"
811 #include "hpm_iomux.h"
812 #include "hpm_pmic_iomux.h"
813 #include "hpm_batt_iomux.h"
814 #endif /* HPM_SOC_H */
815