1 /** @file reg_system.h 2 * @brief System Register Layer Header File 3 * @date 29.May.2013 4 * @version 03.05.02 5 * 6 * This file contains: 7 * - Definitions 8 * - Types 9 * . 10 * which are relevant for the System driver. 11 */ 12 13 /* (c) Texas Instruments 2009-2013, All rights reserved. */ 14 15 #ifndef __REG_SYSTEM_H__ 16 #define __REG_SYSTEM_H__ 17 18 #include "sys_common.h" 19 #include "gio.h" 20 21 22 /* System Register Frame 1 Definition */ 23 /** @struct systemBase1 24 * @brief System Register Frame 1 Definition 25 * 26 * This type is used to access the System 1 Registers. 27 */ 28 /** @typedef systemBASE1_t 29 * @brief System Register Frame 1 Type Definition 30 * 31 * This type is used to access the System 1 Registers. 32 */ 33 typedef volatile struct systemBase1 34 { 35 uint32 SYSPC1; /* 0x0000 */ 36 uint32 SYSPC2; /* 0x0004 */ 37 uint32 SYSPC3; /* 0x0008 */ 38 uint32 SYSPC4; /* 0x000C */ 39 uint32 SYSPC5; /* 0x0010 */ 40 uint32 SYSPC6; /* 0x0014 */ 41 uint32 SYSPC7; /* 0x0018 */ 42 uint32 SYSPC8; /* 0x001C */ 43 uint32 SYSPC9; /* 0x0020 */ 44 uint32 SSWPLL1; /* 0x0024 */ 45 uint32 SSWPLL2; /* 0x0028 */ 46 uint32 SSWPLL3; /* 0x002C */ 47 uint32 CSDIS; /* 0x0030 */ 48 uint32 CSDISSET; /* 0x0034 */ 49 uint32 CSDISCLR; /* 0x0038 */ 50 uint32 CDDIS; /* 0x003C */ 51 uint32 CDDISSET; /* 0x0040 */ 52 uint32 CDDISCLR; /* 0x0044 */ 53 uint32 GHVSRC; /* 0x0048 */ 54 uint32 VCLKASRC; /* 0x004C */ 55 uint32 RCLKSRC; /* 0x0050 */ 56 uint32 CSVSTAT; /* 0x0054 */ 57 uint32 MSTGCR; /* 0x0058 */ 58 uint32 MINITGCR; /* 0x005C */ 59 uint32 MSINENA; /* 0x0060 */ 60 uint32 MSTFAIL; /* 0x0064 */ 61 uint32 MSTCGSTAT; /* 0x0068 */ 62 uint32 MINISTAT; /* 0x006C */ 63 uint32 PLLCTL1; /* 0x0070 */ 64 uint32 PLLCTL2; /* 0x0074 */ 65 uint32 UERFLAG; /* 0x0078 */ 66 uint32 DIEIDL; /* 0x007C */ 67 uint32 DIEIDH; /* 0x0080 */ 68 uint32 VRCTL; /* 0x0084 */ 69 uint32 LPOMONCTL; /* 0x0088 */ 70 uint32 CLKTEST; /* 0x008C */ 71 uint32 DFTCTRLREG1; /* 0x0090 */ 72 uint32 DFTCTRLREG2; /* 0x0094 */ 73 uint32 rsvd1; /* 0x0098 */ 74 uint32 rsvd2; /* 0x009C */ 75 uint32 GPREG1; /* 0x00A0 */ 76 uint32 BTRMSEL; /* 0x00A4 */ 77 uint32 IMPFASTS; /* 0x00A8 */ 78 uint32 IMPFTADD; /* 0x00AC */ 79 uint32 SSISR1; /* 0x00B0 */ 80 uint32 SSISR2; /* 0x00B4 */ 81 uint32 SSISR3; /* 0x00B8 */ 82 uint32 SSISR4; /* 0x00BC */ 83 uint32 RAMGCR; /* 0x00C0 */ 84 uint32 BMMCR1; /* 0x00C4 */ 85 uint32 BMMCR2; /* 0x00C8 */ 86 uint32 MMUGCR; /* 0x00CC */ 87 uint32 CLKCNTL; /* 0x00D0 */ 88 uint32 ECPCNTL; /* 0x00D4 */ 89 uint32 DSPGCR; /* 0x00D8 */ 90 uint32 DEVCR1; /* 0x00DC */ 91 uint32 SYSECR; /* 0x00E0 */ 92 uint32 SYSESR; /* 0x00E4 */ 93 uint32 SYSTASR; /* 0x00E8 */ 94 uint32 GBLSTAT; /* 0x00EC */ 95 uint32 DEV; /* 0x00F0 */ 96 uint32 SSIVEC; /* 0x00F4 */ 97 uint32 SSIF; /* 0x00F8 */ 98 uint32 SSIR1; /* 0x00FC */ 99 } systemBASE1_t; 100 101 102 /** @def systemREG1 103 * @brief System Register Frame 1 Pointer 104 * 105 * This pointer is used by the system driver to access the system frame 1 registers. 106 */ 107 #define systemREG1 ((systemBASE1_t *)0xFFFFFF00U) 108 109 /** @def systemPORT 110 * @brief ECLK GIO Port Register Pointer 111 * 112 * Pointer used by the GIO driver to access I/O PORT of System/Eclk 113 * (use the GIO drivers to access the port pins). 114 */ 115 #define systemPORT ((gioPORT_t *)0xFFFFFF04U) 116 117 /* USER CODE BEGIN (0) */ 118 /* USER CODE END */ 119 120 /* System Register Frame 2 Definition */ 121 /** @struct systemBase2 122 * @brief System Register Frame 2 Definition 123 * 124 * This type is used to access the System 2 Registers. 125 */ 126 /** @typedef systemBASE2_t 127 * @brief System Register Frame 2 Type Definition 128 * 129 * This type is used to access the System 2 Registers. 130 */ 131 typedef volatile struct systemBase2 132 { 133 uint32 PLLCTL3; /* 0x0000 */ 134 uint32 rsvd1; /* 0x0004 */ 135 uint32 STCCLKDIV; /* 0x0008 */ 136 uint32 rsvd2[6U]; /* 0x000C */ 137 uint32 ECPCNTRL0; /* 0x0024 */ 138 uint32 rsvd3[5U]; /* 0x0028 */ 139 uint32 CLK2CNTL; /* 0x003C */ 140 uint32 VCLKACON1; /* 0x0040 */ 141 uint32 rsvd4[11U]; /* 0x0044 */ 142 uint32 CLKSLIP; /* 0x0070 */ 143 uint32 rsvd5[30U]; /* 0x0074 */ 144 uint32 EFC_CTLEN; /* 0x00EC */ 145 uint32 DIEIDL_REG0; /* 0x00F0 */ 146 uint32 DIEIDH_REG1; /* 0x00F4 */ 147 uint32 DIEIDL_REG2; /* 0x00F8 */ 148 uint32 DIEIDH_REG3; /* 0x00FC */ 149 } systemBASE2_t; 150 151 /** @def systemREG2 152 * @brief System Register Frame 2 Pointer 153 * 154 * This pointer is used by the system driver to access the system frame 2 registers. 155 */ 156 #define systemREG2 ((systemBASE2_t *)0xFFFFE100U) 157 158 159 #endif 160